參數(shù)資料
型號(hào): ADA4899-1YCPZ-RL
廠商: Analog Devices Inc
文件頁數(shù): 9/21頁
文件大?。?/td> 0K
描述: IC OPAMP VF ULN ULDIST 8LFCSP
產(chǎn)品培訓(xùn)模塊: Practical Guide High Speed PCB Layout
設(shè)計(jì)資源: High Speed, Precision, Differential AC-Coupled Drive Circuit for AD7625 (CN0080)
標(biāo)準(zhǔn)包裝: 5,000
放大器類型: 電壓反饋
電路數(shù): 1
轉(zhuǎn)換速率: 310 V/µs
-3db帶寬: 600MHz
電流 - 輸入偏壓: 6µA
電壓 - 輸入偏移: 35µV
電流 - 電源: 14.7mA
電流 - 輸出 / 通道: 200mA
電壓 - 電源,單路/雙路(±): 4.5 V ~ 12 V,±2.25 V ~ 6 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 8-VFDFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 8-LFCSP-VD(3x3)
包裝: 帶卷 (TR)
ADA4899-1
Rev. B | Page 16 of 20
DISABLE PIN OPERATION
The ADA4899-1 DISABLE pin performs three functions:
enable, disable, and reduction of the input bias current. When
the DISABLE pin is brought to within 0.7 V of the positive
supply, the input bias current circuit is enabled, which reduces
the input bias current by a factor of 100. In this state, the input
current noise doubles from 2.6 pA/√Hz to 5.2 pA/√Hz. Table 7
outlines the DISABLE pin operation.
Table 7. DISABLE Pin Truth Table
Supply Voltage
±5 V
+5 V
Disable
5 V to +2.4 V
0 V to 2.4 V
Enable
Open
Low Input Bias Current
4.3 V to 5 V
ADA4899-1 MUX
With a true output disable, the ADA4899-1 can be used in
multiplexer applications. The outputs of two ADA4899-1s are
wired together to form a 2:1 mux. Figure 51 shows the 2:1 mux
schematic.
05720
-0
64
1MHz
0V TO 5V
+5V
–5V
+5V
–5V
0.1F
ADA4899-1
2V p-p
15MHz
+5V
–5V
0.1F
ADA4899-1
0.1F
2.2F
0.1F
2.2F
+
2k
1k
50
1.02k
50
VREF = 2.50V
2k
1V p-p
15MHz
DISABLE
AD8137
DISABLE
50
RT
50
VOUT
Figure 51. ADA4899-1 2:1 Mux Schematic
An AD8137 differential amplifier is used as a level translator
that converts the TTL input to a complementary ±3 V output to
drive the DISABLE pins of the ADA4899-1s. The transient
response for the 2:1 mux is shown in Figure 52.
05
72
0-
06
5
2
1
CH1 = 500mV/DIV
CH2 = 5V/DIV
200ns/DIV
Figure 52. ADA4899-1 2:1 Mux Transient Response
CIRCUIT CONSIDERATIONS
Careful and deliberate attention to detail when laying out the
ADA4899-1 board yields optimal performance. Power supply
bypassing, parasitic capacitance, and component selection all
contribute to the overall performance of the amplifier.
PCB Layout
Because the ADA4899-1 can operate up to 600 MHz, it is
essential that RF board layout techniques be employed. All
ground and power planes under the pins of the ADA4899-1
should be cleared of copper to prevent the formation of parasitic
capacitance between the input pins to ground and the output
pins to ground. A single mounting pad on a SOIC footprint can
add as much as 0.2 pF of capacitance to ground if the ground
plane is not cleared from under the mounting pads. The low
distortion pinout of the ADA4899-1 reduces the distance
between the output and the inverting input of the amplifier.
This helps minimize the parasitic inductance and capacitance
of the feedback path, which reduces ringing and second harmonic
distortion.
Power Supply Bypassing
Power supply bypassing for the ADA4899-1 has been optimized
for frequency response and distortion performance. Figure 40
shows the recommended values and location of the bypass
capacitors. Power supply bypassing is critical for stability,
frequency response, distortion, and PSR performance. The
0.1 μF capacitors shown in Figure 40 should be as close to the
supply pins of the ADA4899-1 as possible. The electrolytic
capacitors should be directly adjacent to the 0.1 μF capacitors.
The capacitor between the two supplies helps improve PSR and
distortion performance. In some cases, additional paralleled
capacitors can help improve frequency and transient response.
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