參數(shù)資料
型號(hào): ADA4932-2YCPZ-R7
廠商: Analog Devices Inc
文件頁(yè)數(shù): 18/29頁(yè)
文件大小: 0K
描述: IC AMP DIFF DUAL LP 80MA 24LFCSP
標(biāo)準(zhǔn)包裝: 1,500
放大器類型: 差分
電路數(shù): 2
輸出類型: 差分
轉(zhuǎn)換速率: 2800 V/µs
-3db帶寬: 560MHz
電流 - 輸入偏壓: 2.5µA
電壓 - 輸入偏移: 500µV
電流 - 電源: 9.6mA
電流 - 輸出 / 通道: 80mA
電壓 - 電源,單路/雙路(±): 3 V ~ 11 V,±1.5 V ~ 5.5 V
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 24-VFQFN 裸露焊盤(pán),CSP
供應(yīng)商設(shè)備封裝: 24-LFCSP-VQ(4x4)
包裝: 帶卷 (TR)
ADA4932-1/ADA4932-2
Data Sheet
LAYOUT, GROUNDING, AND BYPASSING
As a high speed device, the ADA4932-x is sensitive to the
PCB environment in which it operates. Realizing its superior
performance requires attention to the details of high speed
PCB design.
The first requirement is a solid ground plane that covers as much
of the board area around the ADA4932-x as possible. However,
the area near the feedback resistors (RF), gain resistors (RG), and
the input summing nodes (Pin 2 and Pin 3) should be cleared of
all ground and power planes (see Figure 64). Clearing the ground
and power planes minimizes any stray capacitance at these nodes
and thus minimizes peaking of the response of the amplifier at
high frequencies.
The thermal resistance, θJA, is specified for the device, including
the exposed pad, soldered to a high thermal conductivity 4-layer
circuit board, as described in EIA/JESD51-7.
07752-
055
Figure 64. Ground and Power Plane Voiding in Vicinity of RF and RG
Bypass the power supply pins as close to the device as possible
and directly to a nearby ground plane. High frequency ceramic
chip capacitors should be used. It is recommended that two
parallel bypass capacitors (1000 pF and 0.1 F) be used for each
supply. Place the 1000 pF capacitor closer to the device. Further
away, provide low frequency bulk bypassing using 10 F tantalum
capacitors from each supply to ground.
Signal routing should be short and direct to avoid parasitic effects.
Wherever complementary signals exist, provide a symmetrical
layout to maximize balanced performance. When routing
differential signals over a long distance, keep PCB traces close
together, and twist any differential wiring to minimize loop
area. Doing this reduces radiated energy and makes the circuit
less susceptible to interference.
1.30
0.80
1.30
07752-
056
Figure 65. Recommended PCB Thermal Attach Pad Dimensions (Millimeters)
0.30
PLATED
VIA HOLE
1.30
GROUND PLANE
POWER PLANE
BOTTOM METAL
TOP METAL
07752-
057
Figure 66. Cross-Section of 4-Layer PCB Showing Thermal Via Connection to Buried Ground Plane (Dimensions in Millimeters)
Rev. C | Page 24 of 28
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