參數(shù)資料
型號(hào): ADA4932-2YCPZ-R7
廠商: Analog Devices Inc
文件頁數(shù): 19/29頁
文件大?。?/td> 0K
描述: IC AMP DIFF DUAL LP 80MA 24LFCSP
標(biāo)準(zhǔn)包裝: 1,500
放大器類型: 差分
電路數(shù): 2
輸出類型: 差分
轉(zhuǎn)換速率: 2800 V/µs
-3db帶寬: 560MHz
電流 - 輸入偏壓: 2.5µA
電壓 - 輸入偏移: 500µV
電流 - 電源: 9.6mA
電流 - 輸出 / 通道: 80mA
電壓 - 電源,單路/雙路(±): 3 V ~ 11 V,±1.5 V ~ 5.5 V
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 24-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 24-LFCSP-VQ(4x4)
包裝: 帶卷 (TR)
Data Sheet
ADA4932-1/ADA4932-2
HIGH PERFORMANCE ADC DRIVING
The ADA4932-x is ideally suited for broadband dc-coupled
applications. The circuit in Figure 67 shows a front-end
connection for an ADA4932-1 driving an AD9245, a 14-bit,
20 MSPS/40 MSPS/65 MSPS/80 MSPS ADC, with dc coupling
on the ADA4932-1 input and output. (The AD9245 achieves
its optimum performance when driven differentially.) The
ADA4932-1 eliminates the need for a transformer to drive the
ADC and performs a single-ended-to-differential conversion and
buffering of the driving signal.
The ADA4932-1 is configured with a single 3.3 V supply and a
gain of 1 for a single-ended input to differential output. The
53.6 termination resistor, in parallel with the single-ended
input impedance of approximately 665 , provides a 50
termination for the source. The additional 25.5 (524.5
total) at the inverting input balances the parallel impedance
of the 50 source and the termination resistor driving the
noninverting input.
In this example, the signal generator has a 1 V p-p symmetric,
ground-referenced bipolar output when terminated in 50 .
The VOCM input is bypassed for noise reduction, and set externally
with 1% resistors to maximize output dynamic range on the
tight 3.3 V supply.
Because the inputs are dc-coupled, dc common-mode current
flows in the feedback loops, and a nominal dc level of 0.84 V is
present at the amplifier input terminals. A fraction of the output
signal is also present at the input terminals as a common-mode
signal; its level is equal to the ac output swing at the noninverting
output, divided down by the feedback factor of the lower loop.
In this example, this ripple is 0.5 V p-p × [524.5/(524.5 + 511)] =
0.25 V p-p. This ac signal is riding on the 0.84 V dc level, produc-
ing a voltage swing between 0.72 V and 0.97 V at the input
terminals. This is well within the specified limits of 0.2 V to 1.5 V.
With an output common-mode voltage of 1.65 V, each
ADA4932-1 output swings between 1.4 V and 1.9 V, opposite in
phase, providing a gain of 1 and a 1 V p-p differential signal to
the ADC input. The differential RC section between the
ADA4932-1 output and the ADC provides single-pole low-pass
filtering and extra buffering for the current spikes that are output
from the ADC input when its SHA capacitors are discharged.
The AD9245 is configured for a 1 V p-p full-scale input by
connecting its SENSE pin to VREF, as shown in Figure 67.
ADA4932-1
3.3V
50
499
25.5
10k
1%
511
33
VOCM
2V p-p
SIGNAL
GENERATOR
1V p-p CENTERED
AT GROUND
53.6
0.1F
10F
+
0.1F
10k
1%
20pF
VIN–
AVDD
VIN+ VREF SENSE AGND
AD9245
VOUT, dm = 1V p-p
VOUT, cm = 1.65V
07752-
270
Figure 67. ADA4932-1 Driving an AD9245 ADC with DC-Coupled Input and Output
Rev. C | Page 25 of 28
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