參數(shù)資料
型號: ADA4950-2YCPZ-R7
廠商: Analog Devices Inc
文件頁數(shù): 11/28頁
文件大?。?/td> 0K
描述: IC AMP DIFF DUAL 114MA 24LFCSP
標(biāo)準(zhǔn)包裝: 1
放大器類型: 差分
電路數(shù): 2
輸出類型: 差分
轉(zhuǎn)換速率: 2900 V/µs
-3db帶寬: 750MHz
電壓 - 輸入偏移: 200µV
電流 - 電源: 9.5mA
電流 - 輸出 / 通道: 114mA
電壓 - 電源,單路/雙路(±): 3 V ~ 11 V,±1.5 V ~ 5.5 V
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 24-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 24-LFCSP-VQ(4x4)
包裝: 標(biāo)準(zhǔn)包裝
產(chǎn)品目錄頁面: 765 (CN2011-ZH PDF)
其它名稱: ADA4950-2YCPZ-R7DKR
Data Sheet
ADA4950-1/ADA4950-2
Rev. A | Page 19 of 28
APPLICATIONS INFORMATION
ANALYZING AN APPLICATION CIRCUIT
The ADA4950-x uses high open-loop gain and negative feedback
to force its differential and common-mode output voltages in
such a way as to minimize the differential and common-mode
error voltages. The differential error voltage is defined as the
voltage between the differential inputs labeled +INx and INx
(see Figure 52). For most purposes, this voltage can be assumed
to be 0. Similarly, the difference between the actual output
common-mode voltage and the voltage applied to VOCM can
also be assumed to be 0. Starting from these principles, any
application circuit can be analyzed.
SELECTING THE CLOSED-LOOP GAIN
Using the approach described in the Analyzing an Application
Circuit section, the differential gain of the circuit in Figure 52
can be determined by
G
F
dm
IN
dm
OUT
R
V
=
,
where the input resistors (RG) and the feedback resistors (RF) on
each side are equal.
For G = 1, the +INA and INA inputs are used, and the +INB
and INB inputs are left floating. The differential gain in this
case is calculated as follows:
1
500
=
=
G
F
R
G
For G = 2, the +INB and INB inputs are used, and the +INA
and INA inputs are left floating. The differential gain in this
case is calculated as follows:
2
250
500
=
=
G
F
R
G
For G = 3, the +INA and +INB inputs are connected together,
and the INA and INB inputs are connected together. The
differential gain in this case is calculated as follows:
3
250
||
500
=
=
G
F
R
G
ESTIMATING THE OUTPUT NOISE VOLTAGE
The differential output noise of the ADA4950-x can be estimated
using the noise model in Figure 53. The values of RG depend on
the selected gain. The input-referred noise voltage density, vnIN,
is modeled as a differential input, and the noise currents, inIN and
inIN+, appear between each input and ground. The output voltage
due to vnIN is obtained by multiplying vnIN by the noise gain, GN
(defined in the GN equation that follows Table 13). The noise
currents are uncorrelated with the same mean-square value,
and each produces an output voltage that is equal to the noise
current multiplied by the associated feedback resistance. The
noise voltage density at the VOCM pin is vnCM. When the feedback
networks have the same feedback factor, as is true in most cases,
the output noise due to vnCM is common mode. Each of the four
resistors contributes (4kTRxx)1/2. The noise from the feedback
resistors appears directly at the output, and the noise from the
gain resistors appears at the output multiplied by RF/RG. Table 11
summarizes the input noise sources, the multiplication factors,
and the output-referred noise density terms.
ADA4950-x
+
RF2
vnOD
vnCM
VOCM
vnIN
RF1
RG2
RG1
vnRF1
vnRF2
vnRG1
vnRG2
inIN+
inIN–
07957-
053
Figure 53. Noise Model
Table 11. Output Noise Voltage Density Calculations for Matched Feedback Networks
Input Noise Contribution
Input Noise Term
Input Noise
Voltage Density
Output
Multiplication Factor
Differential Output Noise
Voltage Density Term
Differential Input
vnIN
GN
vnO1 = GN(vnIN)
Inverting Input
inIN
inIN × (RF2)
1
vnO2 = (inIN)(RF2)
Noninverting Input
inIN+
inIN+ × (RF1)
1
vnO3 = (inIN+)(RF1)
VOCM Input
vnCM
0
vnO4 = 0 V
Gain Resistor, RG1
vnRG1
(4kTRG1)1/2
RF1/RG1
vnO5 = (RF1/RG1)(4kTRG1)1/2
Gain Resistor, RG2
vnRG2
(4kTRG2)1/2
RF2/RG2
vnO6 = (RF2/RG2)(4kTRG2)1/2
Feedback Resistor, RF1
vnRF1
(4kTRF1)1/2
1
vnO7 = (4kTRF1)1/2
Feedback Resistor, RF2
vnRF2
(4kTRF2)1/2
1
vnO8 = (4kTRF2)1/2
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