參數(shù)資料
型號: ADA4950-2YCPZ-R7
廠商: Analog Devices Inc
文件頁數(shù): 17/28頁
文件大小: 0K
描述: IC AMP DIFF DUAL 114MA 24LFCSP
標(biāo)準(zhǔn)包裝: 1
放大器類型: 差分
電路數(shù): 2
輸出類型: 差分
轉(zhuǎn)換速率: 2900 V/µs
-3db帶寬: 750MHz
電壓 - 輸入偏移: 200µV
電流 - 電源: 9.5mA
電流 - 輸出 / 通道: 114mA
電壓 - 電源,單路/雙路(±): 3 V ~ 11 V,±1.5 V ~ 5.5 V
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 24-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 24-LFCSP-VQ(4x4)
包裝: 標(biāo)準(zhǔn)包裝
產(chǎn)品目錄頁面: 765 (CN2011-ZH PDF)
其它名稱: ADA4950-2YCPZ-R7DKR
ADA4950-1/ADA4950-2
Data Sheet
Rev. A | Page 24 of 28
HIGH PERFORMANCE ADC DRIVING
The ADA4950-x is ideally suited for broadband dc-coupled
applications. The circuit in Figure 63 shows a front-end
connection for an ADA4950-1 driving an AD9245 ADC,
with dc coupling on the ADA4950-1 input and output. (The
AD9245 achieves its optimum performance when driven
differentially.) The ADA4950-1 eliminates the need for a
transformer to drive the ADC and performs a single-ended-to-
differential conversion and buffering of the driving signal.
The ADA4950-1 is configured with a single 3.3 V supply and a
gain of 2 for a single-ended input to differential output. The
57.6 Ω termination resistor, in parallel with the single-ended
input impedance of 375 Ω, provides a 50 Ω termination for the
source. The additional 26.7 Ω Thevenin resistance added to the
inverting input balances the parallel impedance of the 50 Ω
source and the termination resistor driving the noninverting
input. The required Thevenin bias voltage of 0.27 VDC applied
to the lower loop is obtained by scaling the VREF output of the
AD9245 and buffering it with the AD8031.
In this example, the 50 Ω signal generator has a 1 V p-p unipolar
open-circuit output voltage, and 0.5 V p-p output voltage when
terminated in 50 Ω. The VOCM input is bypassed for noise reduc-
tion and set externally with 1% resistors to maximize output
dynamic range on the tight 3.3 V supply.
Because the inputs are dc-coupled, dc common-mode current
flows in the feedback loops, and a nominal dc level of 0.76 V is
present at the amplifier input terminals. A fraction of the output
signal is also present at the input terminals as a common-mode
signal; its level is equal to the ac output swing at the noninverting
output, divided down by the feedback factor of the lower loop. In
this example, this ripple is 0.5 V p-p × [276.7/(276.7 + 500)] =
0.18 V p-p. This ac signal is riding on the 0.76 V dc level, producing
a voltage swing between 0.67 V and 0.85 V at the input terminals.
This is well within the specified limits of 0.2 V to 1.5 V.
With an output common-mode voltage of 1.65 V, each ADA4950-1
output swings between 1.4 V and 1.9 V, opposite in phase, provid-
ing a gain of 2 and a 1 V p-p differential signal to the ADC input.
The differential RC section between the ADA4950-1 output and
the ADC provides single-pole low-pass filtering and extra buffering
for the current spikes that are output from the ADC input when
its SHA capacitors are discharged.
The AD9245 is configured for a 1 V p-p full-scale input by
connecting its SENSE pin to VREF, as shown in Figure 63.
33
50
57.6
0.1F
20pF
VIN–
VIN+
AGND
AVDD
AD9245
VREF SENSE
10F
+
0.1F
VOUT, dm = 1V p-p
VOUT, cm = +1.65V
1.0V p-p
UNIPOLAR
SIGNAL
SOURCE
ADA4950-1
+3.3V
500
250
NC
250
NC
26.7
0.1F
0V
1.0V
0.5V
VOCM
10k
0.1F
866
1.0k
0.1F
AD8031
0.1F
10F
+
07
95
7-
2
54
Figure 63. ADA4950-1 Driving an AD9245 ADC with Unipolar DC-Coupled Input and Output, Gain = 2
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