參數(shù)資料
型號(hào)： ADA4960-1ACPZ-RL
廠(chǎng)商： Analog Devices Inc
文件頁(yè)數(shù)： 6/20頁(yè)
文件大?。?/td> 0K
描述： IC ADC DRIVER DIFF 16LFCSP
標(biāo)準(zhǔn)包裝： 5,000
類(lèi)型： ADC 驅(qū)動(dòng)器
應(yīng)用： 數(shù)據(jù)采集
安裝類(lèi)型： 表面貼裝
封裝/外殼： 16-WFQFN 裸露焊盤(pán)，CSP
供應(yīng)商設(shè)備封裝： 16-LFCSP-WQ（3x3）
包裝： 帶卷 (TR)
ADA4960-1
Rev. 0 | Page 14 of 20
APPLICATIONS INFORMATION
BASIC CONNECTIONS
The basic connections for operating the ADA4960-1 are shown
in Figure 33. Connect VCC to 5 V and decouple each supply pin
with a low inductance surface-mount ceramic capacitor of 0.1 μF
placed as close to the device as possible.
In addition, decouple the VOCM pin and the VCI pin by using
a 0.1 μF capacitor, whether or not they are used as inputs.
For normal operation, the enable pin (PD) should be tied to VCC.
When the ADA4960-1 is pulled low, it goes into power-down
mode. The VOP and VON outputs are internally biased at VCC/2
with no external source. The output common-mode range can
be adjusted in the range of 1 V to 2.75 V by applying an external
source voltage to the VCOM pin.
INPUT AND OUTPUT INTERFACING
The ADA4960-1 can be configured as a differential-input-to-
differential-output driver, as shown in Figure 31.
The differential broadband input is provided by the ETC1-1-13
balun transformer. The two 25 Ω resistors, R1 and R2, provide
the 50 Ω match to the 50 Ω ac source. The 0.1 μF capacitors,
connected in series with the inputs and outputs, isolate the source
and balanced load from the internal bias. RG is the gain-setting
resistor. Load RL should equal 100 Ω to provide the expected ac
performance (see the Specifications section). Different loads can be
applied with the gain value described by the gain adjust equation
(see the Gain Adjust section).
08
45
8-
03
0
IIP
VIP
R1
25
50
R2
25
0.1F
5V
ETC1-1-13
ADA4960-1
0.1F
AC
VOP
VON
IIN
VIN
RG
RL
2
RL
2
Figure 31. Differential-Input-to-Differential-Output Configuration
The ADA4960-1 can also be configured as a single-ended-input-
to-differential-output driver, as shown in Figure 32. R1 provides the
input source match, and R2 balances the input source impedances.
The 0.1 μF capacitors, connected in series with the inputs and
outputs, isolate the source and balanced load from the internal bias.
RG is the gain-setting resistor. RL should equal 100 Ω to provide
the expected ac performance (see the Specifications section).
08
45
8-
0
28
IIP
VIP
R1
50
50
R2
50
0.1F
5V
ADA4960-1
0.1F
AC
VOP
VON
IIN
VIN
RG
RL
2
RL
2
Figure 32. Single-Ended-Input-to-Differential-Output Configuration
12
11
10
1
3
4
VCC
VOP
VON
9
VCC
VIP
IIN
2
IIP
VIN
6
NC
5
NC
7
VCC
8
VCC
16
PD
15
GND
14
GND
13
VOCM
ADA4960-1
NC = NO CONNECT
0.1F
BALANCED
SOURCE
0.1F
AC
RG
RL
0.1F
10F
0.1F
VCC
BALANCED
LOAD
0.1F
0
84
58
-02
6
RS
2
RS
2
RS
2
RS
2
Figure 33. Basic Connections of the ADA4960-1
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