參數(shù)資料
型號: ADA4960-1ACPZ-RL
廠商: Analog Devices Inc
文件頁數(shù): 8/20頁
文件大?。?/td> 0K
描述: IC ADC DRIVER DIFF 16LFCSP
標(biāo)準(zhǔn)包裝: 5,000
類型: ADC 驅(qū)動器
應(yīng)用: 數(shù)據(jù)采集
安裝類型: 表面貼裝
封裝/外殼: 16-WFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 16-LFCSP-WQ(3x3)
包裝: 帶卷 (TR)
ADA4960-1
Rev. 0 | Page 16 of 20
ADC INTERFACING
The ADA4960-1 is a high speed amplifier with linearity
performance to drive high speed ADCs up to 1 GHz. Several
options are available to the designer to interface with an ADC.
The ADA4960-1 in Figure 38 is a differential input configuration,
using an input balun to provide the differential input signal. The
25 Ω resistors provide the input source match. The ADA4960-1
outputs can be directly connected to the ADC inputs as long as
the ADC input common mode is within the output common-
mode range of the ADA4960-1. The ADC VCM output pin is
connected to the ADA4960-1 VOCM input pin to align the
ADA4960-1 output voltages with the ADC inputs.
A 100 Ω resistor across the outputs of the ADA4960-1 enhances
system bandwidth and distortion performance when the ADA4960-1
is driving an ADC with high input impedance. Lighter load
resistance improves distortion performance and lowers the
overall bandwidth.
IIP
VIP
25
25
50
100
0.1F
5V
ETC1-1-13
ADA4960-1
0.1F
AC
IIN
VIN
RG
08
458-
033
VOP
VIN+
VIN–
ADC
VON
VOCM
VCM
Figure 38. Differential Input Configuration Directly Driving the ADC
The ADA4960-1 in Figure 39 is a single-ended input configuration.
The input is matched to the source with 50 Ω resistors. The
ADA4960-1 outputs can be directly connected to the ADC inputs
as long as the ADC input common mode is within the output
common-mode range of the ADA4960-1.
08458-
034
ADA4960-1
VOP
VIN+
VIN–
ADC
5V
VON
VOCM
VCM
IIP
VIP
50
25
50
0.1F
AC
IIN
VIN
RG
100
Figure 39. Single-Ended Input Configuration Directly Driving the ADC
The signal source can be directly connected to the ADA4960-1
inputs as long as the source dc level is within the common-mode
input range of the ADA4960-1, as shown in Figure 40.
0
845
8-
0
50
ADA4960-1
VOP
VIN+
VIN–
ADC
5V
VON
VOCM
VCM
IIP
VIP
50
25
50
AC
IIN
VIN
RG
VREF
100
Figure 40. Single-Ended Input Configuration, DC-Coupled Inputs and
Outputs
When the ADC input common mode is outside the output
common-mode range of the ADA4960-1, the outputs can be
ac-coupled to provide coupling, as shown in Figure 41.
08458-
035
ADA4960-1
VOP
VIN+
VIN–
ADC
5V
VON
IIP
VIP
50
25
50
0.1F
AC
IIN
VIN
RG
0.1F
100
Figure 41. Single-Ended Input Configuration, AC-Coupled to the ADC
LINE DRIVER APPLICATIONS
The user accessible gain adjust and bandwidth extension
features allow configuration of the ADA4960-1 for line driver
and channel equalization applications from dc to 6.5 Gbps.
Because of its extremely low distortion performance and high
linearity, the ADA4960-1 can be deployed in cable and backplane
channels to extend channel length and improve signaling
margin for serial links using receive equalization and transmit
pre-emphasis. The ADA4960-1 unidirectional signal path is
protocol and encoding agnostic, supporting myriad signaling
types such as NRZ and PAM2/4/8/N, coded (8b/10b), uncoded,
and out-of-band (SATA-OOB) data.
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