參數(shù)資料
型號: ADAV801ASTZ
廠商: ANALOG DEVICES INC
元件分類: 消費家電
英文描述: Audio Codec for Recordable DVD
中文描述: SPECIALTY CONSUMER CIRCUIT, PDSO64
封裝: ROHS COMPLIANT, MS-026BCD, LQFP-64
文件頁數(shù): 38/56頁
文件大小: 1405K
代理商: ADAV801ASTZ
ADAV801
Table 36. Preamble-C LSB Register (Rea
Rev. 0 | Page 38 of 56
d Only)
ADDRESS = 0010101 (0x15)
PRE_C07–00
PRE_C07–PRE_C00
7, 6, 5, 4, 3, 2, 1, 0
Eight least signif
d; otherwise, bits show zeros.
standar
nt bits of th
ica
-bit Preamb -C, when nonaudio data is detected according to the IEC60937
e 16
le
Table 37. Preamble-D M
ADDRESS = 0010110 (0x16)
PRE_D15–08
PR
7, 6, 5, 4, 3, 2, 1, 0
SB Register (Read Only)
E_D15–PRE_D08
Ei
st
of
nonaudio data is detected according to the IEC60937
nonaudio is used, this becomes the eight most significant bits
ght most significant bits of the 16-bit Preamble-D, when
andard; otherwise, bits show zeros. When subframe
the 16-bit Preamble-C of Channel B.
Table 38. Preamble-D LSB Register (Read Only)
PRE_D07–PRE_D00
7, 6, 5, 4, 3, 2, 1, 0
ADDRESS = 0010111 (0x17)
PRE_D07–00
Ei
standard; otherwise, bits
of
the 16-bit Preamble-C of Channel B.
mble-D, when nonaudio data is detected according to the IEC60937
becomes the eight most significant bits
show zeros. When subframe nonaudio is used, this
ght least significant bits of the 16-bit Prea
Table 39. Receiver Erro
Rx
7
amble
Pre
4
CRCError
3
NoStream
2
BiPhase/ Parity
1
Lock
0
r Register (Read Only)
ADDRESS = 0011000 (0x18)
RxValidity
Emphasis
Validity
Emphasis
6
NonAudio
5
NonAudio
Th
This bit is set, if the audio data is pre-emphasized. Once it has been read, it remains high and does not generate an
interrupt unless it changes state.
onaudio) is set. Once it has been read, it does not generate another
upt unle
data bec
audio or
pe of no
is bit is set,
e audio da
s nonaudio due to the det
s what type of preamble was detected. Once read, it remains in its state and does not generate an interrupt
indicate
unless it changes state.
This bit is the error flag for the channel status CRCError check. This bit does not clear until the receiver error regi
is read.
This bit is set, if there is no AES3/SPDIF stream present at the AES3/SPDIF receiver. Once read, it remains high and
does not generate an interrupt unless it changes state.
This bit is set, if a biphase or parity error occurred in the AES3/SPDIF stream. This bit is not cleared until the register is
read.
This bit is set, if the PLL has locked or cleared when the PLL loses lock. Once read, it remains in its state and does not
generate an interrupt unless it changes state.
ived stream.
is is the VALIDITY bit in the AES3 rece
ha
nAudio
Preamble
ion of a pream
ect
. The nonau
ble
preamble type register
dio
ster
NonAudio
This bit is set, when Channel Status Bit 1 (n
interr
ss the
Th
if th
omes
ta i
the ty
naudio data c
nges.
No
CRCError
NoStream
BiPhase/Parity
Lock
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