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參數(shù)資料
| 型號： | ADC-321 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 元件分類： | 圓形連接器 |
| 英文描述： | Circular Connector; No. of Contacts:24; Series:LJT00R; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:25; Circular Contact Gender:Socket; Circular Shell Style:Wall Mount Receptacle |
| 中文描述： | 8位，50MHz的視頻A / D轉(zhuǎn)換 |
| 文件頁數(shù)： | 1/8頁 |
| 文件大?。?/td> | 174K |
| 代理商： | ADC-321 |
DATEL, Inc., Mansfield, MA 02048 (USA.)
Tel: (508)339-3000, (800)233-2765 Fax: (508)339-6356
Email: sales@datel.com
Internet: www.datel.com
ADC-321
8-Bit, 50MHz
Video A/D Converter
1
2
3
4
5
6
7
8
9
BIT 8 (LSB)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1 (MSB)
TEST
+DV
S
(Digital)
TEST
A/D CLOCK
NO CONNECTION
NO CONNECTION
CLAMP IN (CLP)
+AV
S
(Analog)
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
NO CONNECTION
DIGITAL GROUND (DGND)
OUTPUT ENABLE (OE)
CLAMP ENABLE (CLE)
DIGITAL GROUND (DGND)
CLAMP CONTROL (COP)
CLAMP REF. (V
REF
)
REF. BOTTOM SENSE (V
RBS
)
REF. BOTTOM (V
RB
)
ANALOG GROUND (AGND)
ANALOG GROUND (AGND)
ANALOG IN (V
IN
)
+AV
S
(Analog)
+AV
S
(Analog)
REF. TOP (V
RT
)
REF. TOP SENSE (V
RTS
)
10
11
12
13
14
15
16
FEATURES
Low power dissipation (180mW max.)
Input signal bandwith (100MHz)
Optional synchronized clamp function
Low input capacitance (15pF typ.)
+5V or +5V/+3.3V power supply operation
Differential nonlinearity (±LSB max.)
Optional self-biased reference
CMOS/TTL compatible inputs
Outputs 3-state TTL compatible
Surface mount package
GENERAL DESCRIPTION
The ADC-321 is an 8-bit, high speed, monolithic CMOS, sub-
ranging A/D converter. The ADC-321 achieves a sampling rate
comparable to flash converters by employing a sub-ranging
technique which uses multiple comparator blocks each
containing a sample-and-hold amplifier. The ADC-321 can
operate with either a single +5V or dual +5V and +3.3V power
source to allow easy interfacing with 3.3V logic.
An optional synchronous clamp function useful for video signal
processing is provided. The ADC-321 is well suited for the
portable video signal processors due to its low 125mW typical
power dissipation. The ADC-321 also features ±0.5 LSB max.
differential non-linearity, a self bias function that can eliminate the
need for external references, SNR with THD of 45dB, a small
32-pin QFP package and an operating temperature range
of –40 to +85°C
INPUT/OUTPUT CONNECTIONS
Figure 1. ADC-321 Functional Block Diagram
PIN
FUNCTION
PIN
FUNCTION
1
BIT 8 (LSB)
2 BIT 7
3 BIT 6
4
BIT 5
Reference
Supply
4-Bit
Lower
Sampling
Comparator
A
B
Clock
Generator
4-Bit
Upper
Sampling
Comparator
4-Bit
Lower
Encoder
A
B
4-Bit
Upper
Encoder
Upper
Data
Latch
Lower
Data
Latch
–
+
D-FF
31 DGND
30 OUTPUT ENABLE
5
BIT 4
6 BIT 3
7 BIT 2
8
BIT 1 (MSB)
12 A/D CLOCK
15 CLAMP IN
9
TEST (Open)
10 +DV
S
11 TEST (Open)
16
17
18
19
21
20
V
IN
+AV
S
+AV
S
V
RT
+AV
S
V
RTS
22
AGND
23
AGND
24
V
RB
25
V
RBS
26
V
REF
27
CLAMP CONTROL
29
CLAMP ENABLE
28
DGND
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