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參數(shù)資料
| 型號(hào)： | ADC1061CIN |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | ADC |
| 英文描述： | Switch-mode Multi-Chemistry Battery Charger with Peak Voltage Detection Termination 8-SOIC -20 to 70 |
| 中文描述： | 1-CH 10-BIT FLASH METHOD ADC, PARALLEL ACCESS, PDIP20 |
| 封裝： | DIP-20 |
| 文件頁數(shù)： | 2/11頁 |
| 文件大?。?/td> | 320K |
| 代理商： | ADC1061CIN |
Simplified Block and Connection Diagrams
(Continued)
Ordering Information
Industrial (40C
≤
T
A
≤
85C)
ADC1061CIN
ADC1061CIWM
Package
N20A
M20B
Pin Descriptions
Symbol
DV
CC
,
AV
CC
(1, 6)
Function
These are the digital and analog positive supply voltage inputs. They should always be connected to the
same voltage source, but are brought out separately to allow for separate bypass capacitors. Each
supply pin should be bypassed with a 0.1 μF ceramic capacitor in parallel with a 10 μF tantalum
capacitor.
This is the active low interrupt output. INT goes low at the end of each conversion, and returns to a high
state following the rising edge of RD .
This is the Sample/Hold control input. When this pin is forced low, it causes the analog input signal to be
sampled and initiates a new conversion.
This is the active low Read control input. When this pin is low, any data present in the ADC1061’s output
registers will be placed on the data bus. In Mode 2, the Read signal must be low until INT goes low. Until
INT goes low, the data at the output pins will be incorrect.
This is the active low Chip Select control input. This pin enables the S /H and RD inputs.
These are the reference voltage inputs. They may be placed at any voltage between GND 50 mV and
V
CC
+ 50 mV, but V
REF+
must be greater than V
REF
. An input voltage equal to V
REF
produces an
output code of 0, and an input voltage equal to V
REF+
1LSB produces an output code of 1023.
This is the analog input pin. The impedance of the source should be less than 500
for best accuracy
and conversion speed. To avoid damage to the ADC1061, V
IN
should not be allowed to extend beyond
the power supply voltages by more than 300 mV unless the drive current is limited. For accurate
conversions, V
IN
should not extend more than 50 mV beyond the supply voltages.
This is the power supply ground pin. The ground pin should be connected to a “clean” ground reference
point.
These are the TRI-STATE output pins.
INT (2)
S /H (3)
RD (4)
CS (5)
V
REF
,
V
REF+
(7, 9)
V
IN
(8)
GND (10)
DB0–DB9
(11-20)
Dual-In-Line Package
DS010559-1
Top View
Order Number
ADC1061CIN or ADC1061CIWM
See NS Package J20A,
M20B or N20A
www.national.com
2
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| ADC1061CIN/NOPB | 功能描述:IC ADC 10BIT MPU COMP HS 20-DIP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 位數(shù):12 采樣率（每秒）:3M 數(shù)據(jù)接口:- 轉(zhuǎn)換器數(shù)目:- 功率耗散（最大）:- 電壓電源:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:SOT-23-6 供應(yīng)商設(shè)備封裝:SOT-23-6 包裝:帶卷 (TR) 輸入數(shù)目和類型:- |
| ADC1061CIWM | 功能描述:IC ADC 10BIT 20-SOIC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 位數(shù):12 采樣率（每秒）:3M 數(shù)據(jù)接口:- 轉(zhuǎn)換器數(shù)目:- 功率耗散（最大）:- 電壓電源:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:SOT-23-6 供應(yīng)商設(shè)備封裝:SOT-23-6 包裝:帶卷 (TR) 輸入數(shù)目和類型:- |
| ADC1061CIWM/NOPB | 制造商:Texas Instruments 功能描述:ADC Single Semiflash 556ksps 10-bit Parallel 20-Pin SOIC W |
| ADC1061CIWMX | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog-to-Digital Converter， 10-Bit |
| ADC1061CIWMX/NOPB | 制造商:Texas Instruments 功能描述:ADC Single Semiflash 556ksps 10-bit Parallel 20-Pin SOIC W T/R |
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