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參數(shù)資料
| 型號(hào)： | ADC1061CIN |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | ADC |
| 英文描述： | Switch-mode Multi-Chemistry Battery Charger with Peak Voltage Detection Termination 8-SOIC -20 to 70 |
| 中文描述： | 1-CH 10-BIT FLASH METHOD ADC, PARALLEL ACCESS, PDIP20 |
| 封裝： | DIP-20 |
| 文件頁(yè)數(shù)： | 9/11頁(yè) |
| 文件大?。?/td> | 320K |
| 代理商： | ADC1061CIN |
4.0 Inherent Sample-and-Hold
(Continued)
The ADC1061 can perform accurate conversions of input
signals at frequencies from DC to greater than 160 kHz with-
out the need for external sampling circuitry.
5.0 Power Supply Considerations
The ADC1061 is designed to operate from a +5V (nominal)
power supply. There are two supply pins, AV
and DV
.
These pins allow separate external bypass capacitors for the
analog and digital portions of the circuit. To guarantee accu-
rate conversions, the two supply pins should be connected
to the same voltage source, and each should be bypassed
with a 0.1 μF ceramic capacitor in parallel with a 10 μF tan-
talum capacitor. Depending on the circuit board layout and
other system considerations, more bypassing may be neces-
sary.
It is important to ensure that none of the ADC1061’s input or
output pins are ever driven to a voltage more than 300 mV
above AV
and DV
, or more than 300 mV below GND. If
these voltage limits are exceeded, the overdrive current into
or out of any pin on the ADC1061 must be limited to less
than 5 mA, and no more than 20 mA of overdrive current (all
overdriven pins combined) should flow. In systems with mul-
tiple power supplies, this may require careful attention to
power supply sequencing. The ADC1061’s power supply
pins should be at the proper voltage before signals are ap-
plied to any of the other pins.
6.0 Layout and Grounding
In order to ensure fast, accurate conversions from the
ADC1061, it is necessary to use appropriate circuit board
layout techniques. The analog ground return path should be
low-impedance and free of noise from other parts of the sys-
tem. Noise from digital circuitry can be especially trouble-
some, so digital grounds should always be separate from
analog grounds. For best performance, separate ground
planes should be provided for the digital and analog parts of
the system.
All bypass capacitors should be located as close to the con-
verter as possible and should connect to the converter and
to ground with short traces. The analog input should be iso-
lated from noisy signal traces to avoid having spurious sig-
nals couple to the input. Any external component (e.g., a fil-
ter capacitor) connected across the converter’s input should
be connected to a very clean ground return point. Grounding
the component at the wrong point will result in reduced con-
version accuracy.
www.national.com
9
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