參數(shù)資料
型號(hào): ADC12020EVAL
廠商: National Semiconductor Corporation
英文描述: 12-Bit, 20 MSPS, 185 mW A/D Converter with Internal Sample-and-Hold
中文描述: 12位,20 MSPS的,185毫瓦的A / D轉(zhuǎn)換器,內(nèi)置采樣保持電路
文件頁(yè)數(shù): 8/23頁(yè)
文件大?。?/td> 621K
代理商: ADC12020EVAL
AC Electrical Characteristics
(Continued)
20051707
Note 8:
To guarantee accuracy, it is required that |V
A
–V
D
|
100 mV and separate bypass capacitors are used at each power supply pin.
Note 9:
With the test condition for V
REF
= +2.0V (4V
P-P
differential input), the 12-bit LSB is 977 μV.
Note 10:
Typical figures are at T
A
= T
J
= 25C, and represent most likely parametric norms. Test limits are guaranteed to National’sAOQL(Average Outgoing Quality
Level).
Note 11:
Integral Non Linearity is defined as the deviation of the analog value, expressed in LSBs, from the straight line that passes through positive and negative
full-scale.
Note 12:
Timing specifications are tested at TTL logic levels, V
IL
= 0.4V for a falling edge and V
IH
= 2.4V for a rising edge.
Note 13:
Optimum performance will be obtained by keeping the reference input in the 1.8V to 2.2V range. The LM4051CIM3-ADJ (SOT-23 package) is
recommended for this application.
Note 14:
I
DR
is the current consumed by the switching of the output drivers and is primarily determined by load capacitance on the output pins, the supply voltage,
V
DR
, and the rate at which the outputs are switching (which is signal dependent). I
DR
=V
DR
(C
0
x f
0
+ C
1
x f
1
+....C
11
x f
11
) where V
DR
is the output driver power supply
voltage, C
n
is total capacitance on the output pin, and f
n
is the average frequency at which that pin is toggling.
Note 15:
Excludes I
DR
. See note 14.
A
www.national.com
8
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