參數(shù)資料
型號: ADC12048
廠商: National Semiconductor Corporation
英文描述: 12-Bit Plus Sign 216 kHz 8-Channel Sampling Analog-to-Digital Converter
中文描述: 12位帶符號216 kHz的8聲道采樣模擬到數(shù)字轉(zhuǎn)換器
文件頁數(shù): 25/30頁
文件大?。?/td> 635K
代理商: ADC12048
Features and Operating Modes
(Continued)
register on the data bus. With the START command in the
configuration register, the rising edge of the second read
pulse will raise the RDY signal high and begin a conversion
cycle following a rising edge on the SYNC pin.
13-bit mode: The MUX channel should be selected, the
SYNC bit should be set and the START command issued
with a single write to the ADC12048. A rising edge on the
SYNC pin or on the RD pin will force the RDY signal high. It
is recommended that the action of reading from the
ADC12048 (not the rising edge of the SYNC signal) be used
to raise the RDY signal. This will ensure that the conversion
result is read during the acquisition period of the next con-
version cycle, eliminating a read from the ADC12048 while it
is performing a conversion. Noise generated by accessing
the ADC12048 while it is converting may degrade the con-
version result. In the SYNC-IN mode, only the rising edge of
the SYNC signal will begin a conversion cycle. The RDY sig-
nal will go low when the conversion cycle is done. The acqui-
sition time is controlled by the SYNC signal. The acquisition
period begins following a write cycle containing MUX chan-
nel information. The selected MUX channel is sampled after
the rising edge of the WR signal until the rising edge of the
SYNC pulse, at which time the signal will be held and con-
version begins.Anew MUX channel and/or operational com-
mand may be written into the Configuration register at this
time, if needed. With the START command in the Configura-
tion register, a read from the ADC12048 will place the entire
conversion result stored in the Data register on the data bus
and the rising edge of the read pulse will force the RDY sig-
nal high. The selected MUX channel will be sampled until a
rising edge appears on the SYNC pin, at which the time
sampled signal will be held and a conversion cycle started.
STANDBY COMMAND
8-bitmode: The first byte written to theADC12048 should set
the HB bit in the Configuration register (bit b
7
). The second
byte must issue the Standby command (bits b
11
, b
10
, b
9
= 0,
0, 0).
13-bit mode: The Standby command must be issued to the
ADC12048 in single write (bits b
11
, b
10
, b
9
= 0, 0, 0).
RESET
The RESET command places the ADC12048 into a ready
state and forces the RDY signal low. The RESET command
can be used to interrupt the ADC12048 while it is performing
a conversion, full-calibration or auto-zero cycle. It can also
be used to get the ADC12048 out of the standby mode.
Analog Application Information
REFERENCE VOLTAGE
The ADC12048 has two reference inputs, V
REF
+ and V
REF
.
They define the zero to full-scale range of the analog input
signals over which 4095 positive and 4096 negative codes
exist. The reference inputs can be connected to span the en-
tire supply voltage range (V
= AGND, V
+ = V
+) or
they can be connected to different voltages when other input
spans are required. The reference inputs of the ADC12048
have transient capacitive switching currents. The voltage
sources driving V
+ and V
must have very low output
impedence and noise and must be adequately bypassed.
The circuit in Figure 20 is an example of a very stable refer-
ence source.
The ADC12048 can be used in either ratiometric or absolute
reference appplications. In ratiometric systems, the analog
input voltage is proportional to the voltage used for the
ADC’s reference voltage. This technique relaxes the system
reference requirements because the analog input voltage
moves with the ADC’s reference. The system power supply
can be used as the reference voltage by connecting the
V
+ pin to V
+ and the V
pin to AGND. For absolute
accuracy, where the analog input voltage varies between
very specific voltage limits, a time and temperature stable
voltage source can be connected to the reference inputs.
Typically, the reference voltage’s magnitude will require an
initial adjustment to null reference voltage induced full-scale
errors.
The reference voltage inputs are not fully differential. The
ADC12048
will
not
generate
(V
REF
+) – (V
REF
) is below 1V. Figure 19 shows the allow-
able relationship between V
REF
+ and V
REF
.
correct
conversions
if
DS012387-37
FIGURE 19. V
REF
Operating Range
A
www.national.com
25
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