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參數(shù)資料
| 型號： | ADC12081 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | 12-Bit, 5 MHz Self-Calibrating, Pipelined A/D Converter with Internal Sample & Hold(12位5 MHz可自行校對的管線式帶內(nèi)部采樣和保持功能A/D轉(zhuǎn)換器) |
| 中文描述： | 12位，5兆赫自校準，流水線A / D轉(zhuǎn)換器，內(nèi)置采樣 |
| 文件頁數(shù)： | 15/16頁 |
| 文件大?。?/td> | 351K |
| 代理商： | ADC12081 |
Applications Information
(Continued)
300mV below the ground pins or 300mV above the supply
pins). Exceeding these limits on even a transient basis may
cause faulty or erratic operation. It is not uncommon for high
speed digital circuits (e.g., 74F and 74AC devices) to exhibit
undershoot that goes more than a volt below ground above
the power supply. A resistor of about 50 to 100
in series
with the offending digital input will eliminate the problem.
Care should be taken not to overdrive the inputs of the
ADC12081 with a device that is powered from supplies
outside the range of the ADC12081 supply. Such practice
may lead to conversion inaccuracies and even to device
damage.
Attempting to drive a high capacitance digital data bus.
Capacitive loading on the digital outputs causes instanta-
neous digital currents to flow from the V
I/O supply into the
DGND I/O ground plane. These large charging current
spikes can couple into the analog section, degrading dy-
namic performance. Adequate bypassing and maintaining
separate analog and digital ground planes will reduce this
problem. The digital data outputs should be buffered (with
74ACQ541, for example). Dynamic performance can also be
improved by adding series resistors at each digital output,
close to the ADC12081, reducing the energy coupled back
into the converter output pins by limiting the output slew rate.
A reasonable value for these resistors is 47
.
Using an inadequate amplifier to drive the analog input.
The analog input circuits of the ADC12081 place a switched
capacitor load on the input signal source. Therefore the
amplifier used to drive the ADC12081 must have a low
impedance output and adequate bandwidth to avoid distor-
tion of the input signal.
Operating with the reference pins outside of the speci-
fied range.
As mentioned in section 1.1, V
should be in
the range of 1.8V
≤
V
≤
2.2V. Operating outside of these
limits could lead to signal distortion.
Using a clock source with excessive jitter, using exces-
sively long clock signal trace, or having other signals
coupled to the clock signal trace.
This will cause the
sampling interval to vary, causing excessive output noise
and a reduction in SNR performance.
A
www.national.com
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADC12081_02 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:12-Bit, 5MHz Self-Calibrating, Pipelined A/D Converter with Internal Samble & Hold |
| ADC12081CIVT | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADC12081CIVT/NOPB | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADC12081CIVTX | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADC12081CIVTX NOPB | 制造商:National Semiconductor 功能描述:ADC Single Pipelined 5Msps 12-bit Parallel 32-Pin LQFP T/R |
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