參數(shù)資料
型號(hào)： ADC1210S065HN
廠商： NXP Semiconductors N.V.
元件分類(lèi)： 外設(shè)及接口
英文描述： Single 12-bit ADC 65 Msps CMOS or LVDS DDR digital outputs
封裝： ADC1210S065HN/C1<SOT618-1 (HVQFN40)|<<http://www.nxp.com/packages/SOT618-1.html<1<Always Pb-free,;ADC1210S065HN/C1<SOT618-1 (HVQFN40)|<<http://www.nxp.com/packages/SOT618
文件頁(yè)數(shù)： 25/39頁(yè)
文件大?。?/td> 283K
代理商： ADC1210S065HN
ADC1210S_SER
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 23 December 2010
25 of 39
NXP Semiconductors
ADC1210S series
Single 12-bit ADC; CMOS or LVDS DDR digital outputs
Table 14.
LVDS_INT_TER[2:0]
000
001
010
011
100
101
110
111
11.5.3
DAta Valid (DAV) output clock
A data valid output clock signal (DAV) can be used to capture the data delivered by the
ADC1210S. Detailed timing diagrams for CMOS and LVDS DDR modes are shown in
Figure 4
and
Figure 5
respectively.
11.5.4
Out-of-Range (OTR)
An out-of-range signal is provided on pin OTR. The latency of OTR is fourteen clock
cycles. The OTR response can be speeded up by enabling Fast OTR
(bit FASTOTR = logic 1; see
Table 29
). In this mode, the latency of OTR is reduced to only
four clock cycles. The Fast OTR detection threshold (below full-scale) can be
programmed via bits FASTOTR_DET[2:0].
Table 15.
FASTOTR_DET[2:0]
000
001
010
011
100
101
110
111
11.5.5
Digital offset
By default, the ADC1210S delivers output code that corresponds to the analog input.
However it is possible to add a digital offset to the output code via the SPI (bits
DIG_OFFSET[5:0]; see
Table 25
).
11.5.6
Test patterns
For test purposes, the ADC1210S can be configured to transmit one of a number of
predefined test patterns (via bits TESTPAT_SEL[2:0]; see
Table 26
). A custom test pattern
can be defined by the user (TESTPAT_USER[11:0]; see
Table 27
and
Table 28
) and is
selected when TESTPAT_SEL[2:0] = 101. The selected test pattern is transmitted
regardless of the analog input.
LVDS DDR output register 2
Resistor value (
)
no internal termination
300
180
110
150
100
81
60
Fast OTR register
Detection level (dB)
20.56
16.12
11.02
7.82
5.49
3.66
2.14
0.86
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADC1210S065HN,518 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12bit 70dB 125MSPS RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類(lèi)型:Differential 信噪比:107 dB 接口類(lèi)型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
ADC1210S065HN/C1 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:Single 12-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps; CMOS or LVDS DDR digital outputs
ADC1210S065HN/C1,5 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12bit 70dB 125MSPS RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類(lèi)型:Differential 信噪比:107 dB 接口類(lèi)型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
ADC1210S065HN-C1 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類(lèi)型:Differential 信噪比:107 dB 接口類(lèi)型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
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