參數(shù)資料
型號： ADC12132CIMSA
廠商： NATIONAL SEMICONDUCTOR CORP
元件分類： ADC
英文描述： Switch-mode Lead-Acid Battery Charger with User-Selectable Charge Algorithms 16-SOIC -20 to 70
中文描述： 2-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20
封裝： SSOP-20
文件頁數(shù)： 35/41頁
文件大?。?/td> 1085K
代理商： ADC12132CIMSA
Application Hints
(Continued)
11.0 CLOCK SIGNAL LINE ISOLATION
The ADC12130/2/8’s performance is optimized by routing
the analog input/output and reference signal conductors as
far as possible from the conductors that carry the clock sig-
nals to the CCLK and SCLK pins. Ground traces parallel to
the clock signal traces can be used on printed circuit boards
to reduce clock signal interference on the analog input/
output pins.
12.0 THE CALIBRATION CYCLE
A calibration cycle needs to be started after the power sup-
plies, reference, and clock have been given enough time to
stabilize after initial turn-on. During the calibration cycle, cor-
rection values are determined for the offset voltage of the
sampled data comparator and any linearity and gain errors.
These values are stored in internal RAM and used during an
analog-to-digital conversion to bring the overall full-scale,
offset, and linearity errors down to the specified limits.
Full-scale error typically changes
±
0.4 LSB over tempera-
ture and linearity error changes even less; therefore it should
be necessary to go through the calibration cycle only once
after power up if the Power Supply Voltage and the ambient
temperature do not change significantly (see the curves in
the Typical Performance Characteristics).
13.0 THE AUTO-ZERO CYCLE
To correct for any change in the zero (offset) error of theA/D,
the auto-zero cycle can be used. It may be necessary to do
an auto-zero cycle whenever the ambient temperature or the
power supply voltage change significantly. (See the curves
titled “Zero Error Change vs Ambient Temperature” and
“Zero Error Change vs Supply Voltage” in the Typical Perfor-
mance Characteristics.)
14.0 DYNAMIC PERFORMANCE
Many applications require the A/D converter to digitize AC
signals, but the standard DC integral and differential nonlin-
earity specifications will not accurately predict the A/D con-
verter’s performance with AC input signals. The important
specifications for AC applications reflect the converter’s abil-
ity to digitize AC signals without significant spectral errors
and without adding noise to the digitized signal. Dynamic
characteristics such as signal-to-noise (S/N), signal-to-noise
+ distortion ratio (S/(N + D)), effective bits, full power band-
width, aperture time and aperture jitter are quantitative mea-
sures of the A/D converter’s capability.
An A/D converter’s AC performance can be measured using
Fast Fourier Transform (FFT) methods. A sinusoidal wave-
form is applied to the A/D converter’s input, and the trans-
form is then performed on the digitized waveform. S/(N + D)
and S/N are calculated from the resulting FFT data, and a
spectral plot may also be obtained. Typical values for S/N
are shown in the table of Electrical Characteristics, and
spectral plots of S/(N + D) are included in the typical perfor-
mance curves.
The A/D converter’s noise and distortion levels will change
with the frequency of the input signal, with more distortion
and noise occurring at higher signal frequencies. This can be
seen in the S/(N + D) versus frequency curves. These curves
will also give an indication of the full power bandwidth (the
frequency at which the S/(N + D) or S/N drops 3 dB).
Effective number of bits can also be useful in describing the
A/D’s noise performance. An ideal A/D converter will have
some amount of quantization noise, determined by its reso-
lution, which will yield an optimum S/N ratio given by the fol-
lowing equation:
S/N = (6.02 x n + 1.76) dB
where n is the A/D’s resolution in bits.
The effective bits of a real A/D converter, therefore, can be
found by:
As an example, this device with a differential signed 5V,
10 kHz sine wave input signal will typically have a S/N of
78 dB, which is equivalent to 12.6 effective bits.
15.0 AN RS232 SERIAL INTERFACE
Shown on the following page is a schematic for an RS232 in-
terface to any IBM and compatible PCs. The DTR, RTS, and
CTS RS232 signal lines are buffered via level translators
and connected to the ADC12138’s DI, SCLK, and DO pins,
respectively. The D flip/flop is used to generate the CS
signal.
A
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參數(shù)描述
ADC12132CIMSA 制造商:Texas Instruments 功能描述:IC 12BIT ADC SMD 12132 SSOP20
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ADC12132CIMSAX 功能描述:IC ADC 12BIT 20-SSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 位數(shù):12 采樣率（每秒）:3M 數(shù)據(jù)接口:- 轉(zhuǎn)換器數(shù)目:- 功率耗散（最大）:- 電壓電源:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:SOT-23-6 供應商設備封裝:SOT-23-6 包裝:帶卷 (TR) 輸入數(shù)目和類型:-
ADC12138 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Self-Calibrating 12-Bit Plus Sign Serial I/O A/D Converters with MUX and Sample/Hold
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