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參數(shù)資料
| 型號： | ADC121S101EVAL |
| 廠商： | National Semiconductor Corporation |
| 元件分類： | 串行ADC |
| 英文描述： | 1MSPS, 12-/10-/8-Bit A/D Converters in SOT-23 |
| 中文描述： | 1MSPS，12/10/8位的A / D轉(zhuǎn)換器采用SOT - 23 |
| 文件頁數(shù)： | 7/20頁 |
| 文件大?。?/td> | 1049K |
| 代理商： | ADC121S101EVAL |
Specification Definitions
APERTURE DELAY
is the time between the second falling
SCLK edge of a conversion and the time when the input
signal is acquired or held for conversion.
COMMON MODE REJECTION RATIO (CMRR)
is a mea-
sure of how well in-phase signals common to both input pins
are rejected.
CMRR = 20 LOG (
Common Input /
Output)
CONVERSION TIME
is the time required, after the input
voltage is acquired, for the ADC to convert the input voltage
to a digital word.
DIFFERENTIAL NON-LINEARITY (DNL)
is the measure of
the maximum deviation from the ideal step size of 1 LSB.
DUTY CYCLE
is the ratio of the time that a repetitive digital
waveform is high to the total time of one period. The speci-
fication here refers to the SCLK.
EFFECTIVE NUMBER OF BITS (ENOB, or EFFECTIVE
BITS)
is another method of specifying Signal-to-Noise and
Distortion or SINAD. ENOB is defined as (SINAD 1.76) /
6.02 and says that the converter is equivalent to a perfect
ADC of this (ENOB) number of bits.
FULL POWER BANDWIDTH
is a measure of the frequency
at which the reconstructed output fundamental drops 3 dB
below its low frequency value for a full scale input.
GAIN ERROR
is the difference between Positive Full Scale
Error and Negative Full Scale Error.
INTEGRAL NON-LINEARITY (INL)
is a measure of the
deviation of each individual code from a line drawn from
negative full scale (
1
2
LSB below the first code transition)
through positive full scale (
1
2
LSB above the last code
transition). The deviation of any given code from this straight
line is measured from the center of that code value.
MISSING CODES
are those output codes that will never
appear at the ADC outputs. The ADC121S625 is guaranteed
not to have any missing codes.
NEGATIVE FULL-SCALE ERROR
is the difference be-
tween the differential input voltage at which the output code
transitions from negative full scale and the next code and
V
REF
+ 0.5 LSB
OFFSET ERROR
is the difference between the differential
input voltage at which the output code transitions from code
000h to 001h and 1/2 LSB.
POSITIVE FULL-SCALE ERROR
is the difference between
the differential input voltage at which the output code transi-
tions to positive full scale V
REF
minus 1.5 LSB.
POWER SUPPLY REJECTION RATIO (PSRR)
is a mea-
sure of how well a change in the supply voltage is rejected.
It is the ratio of the change in Full-Scale Gain Error or the
Offset Error that results from a change in the d.c. power
supply voltage, expressed in dB.
PSRR = 20 LOG (
V
A
/
Offset)
PSRR = 20 LOG (
V
A
/
Gain)
SIGNAL TO NOISE RATIO (SNR)
is the ratio, expressed in
dB, of the rms value of the input signal to the rms value of the
sum of all other spectral components below one-half the
sampling frequency, not including harmonics or d.c.
SIGNAL TO NOISE PLUS DISTORTION (S/N+D or SINAD)
Is the ratio, expressed in dB, of the rms value of the input
signal to the rms value of all of the other spectral compo-
nents below half the clock frequency, including harmonics
but excluding d.c.
SPURIOUS FREE DYNAMIC RANGE (SFDR)
is the differ-
ence, expressed in dB, between the rms values of the input
signal and the peak spurious signal, where a spurious signal
is any signal present in the output spectrum that is not
present at the input.
TOTAL HARMONIC DISTORTION (THD)
is the ratio, ex-
pressed in dB, expressed in dB or dBc, of the rms total of the
first five harmonic components at the output to the rms level
of the input signal frequency as seen at the output. THD is
calculated as
where A
is the RMS power of the input frequency at the
output and A
through A
f10
are the RMS power in the first 9
harmonic frequencies.
THROUGHPUT TIME
is the minimum time required between
the start of two successive conversion.
A
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADC121S101EVM | 功能描述:EVAL BOARD FOR ADC121S101 制造商:texas instruments 系列:- 零件狀態(tài):在售 A/D 轉(zhuǎn)換器數(shù):1 位數(shù):12 采樣率（每秒）:1M 數(shù)據(jù)接口:串行 輸入范圍:0 ~ 5.25 V 不同條件下的功率（典型值）:10mW @ 1MSPS 使用的 IC/零件:ADC121S101 所含物品:板 標準包裝:1 |
| ADC121S101-Q1 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Single Channel, 0.5 to 1 Msps, 12-Bit A/D Converter |
| ADC121S101QIMF/NOPB | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Auto Sgl CH 0.5 to 1Msps 12B A/D Cnvtr RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADC121S101QIMFX/NOPB | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Auto Sgl CH 0.5 to 1Msps 12B A/D Cnvtr RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADC121S625 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:12-Bit, 50 ksps to 200 ksps, Differential Input, Micro Power Sampling A/D Converter |
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