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參數(shù)資料
| 型號： | ADC12662CIV |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | ADC |
| 英文描述： | 12-Bit, 1.5 MHz, 200 mW A/D Converter with Input Multiplexer and Sample/Hold |
| 中文描述： | 2-CH 12-BIT FLASH METHOD ADC, PARALLEL ACCESS, PQCC44 |
| 封裝： | PLASTIC, LCC-44 |
| 文件頁數(shù)： | 18/23頁 |
| 文件大?。?/td> | 495K |
| 代理商： | ADC12662CIV |
Applications Information
(Continued)
5.0 POWER SUPPLY CONSIDERATIONS
The ADC12662 is designed to operate from a single +5V
power supply. There are two analog supply pins (AV
) and
one digital supply pin (DV
). These pins allow separate
external bypass capacitors for the analog and digital portions
of the circuit. To guarantee proper operation of the converter,
all three supply pins should be connected to the same
voltage source. In systems with separate analog and digital
supplies, the converter should be powered from the analog
supply.
The ground pins are AGND (analog ground), DGND1 (digital
input ground), and DGND2 (digital output ground). These
pins allow for three separate ground planes for these sec-
tions of the chip. Isolating the analog section from the two
digital sections reduces digital interference in the analog
circuitry, improving the dynamic performance of the con-
verter. Separating the digital outputs from the digital inputs
(particularly the S/H input) reduces the possibility of ground
bounce from the 12 data lines causing jitter on the S/H input.
The analog ground plane should be connected to the Digi-
tal2 ground plane at the ground return for the power supply.
The Digital1 ground plane should be tied to the Digital2
ground plane at the DGND1 and DGND2 pins.
Both AV
pins should be bypassed to the AGND ground
plane with 0.1 μF ceramic capacitors. One of the two AV
pins should also be bypassed with a 10 μF tantalum capaci-
tor. DV
should be bypassed to the DGND2 ground pIane
with a 0.1 μF capacitor in parallel with a 10 μF tantalum
capacitor.
6.0 LAYOUT AND GROUNDING
In order to ensure fast, accurate conversions from the
ADC12662, it is necessary to use appropriate circuit board
layout techniques. Separate analog and digital ground
planes are required to meet datasheetAC and DC limits. The
analog ground plane should be low-impedance and free of
noise from other parts of the system.
All bypass capacitors should be located as close to the
converter as possible and should connect to the converter
and to ground with short traces. The analog input should be
isolated from noisy signal traces to avoid having spurious
signals couple to the input. Any external component (e.g., a
filter capacitor) connected across the converter’s input
should be connected to a very clean analog ground return
point. Grounding the component at the wrong point will result
in increased noise and reduced conversion accuracy.
01187623
FIGURE 11. Using the V
REF
Force Pins Only
A
www.national.com
18
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