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參數(shù)資料
| 型號： | ADC76A |
| 英文描述： | 16-Bit ANALOG-TO-DIGITAL CONVERTER |
| 中文描述： | 16位模擬數(shù)字轉(zhuǎn)換器 |
| 文件頁數(shù)： | 6/8頁 |
| 文件大小： | 113K |
| 代理商： | ADC76A |
ADC76
6
270k
MSB 1
2
3
4
5
6
7
8
9
10
11
12
13
15
14
NC 16
32
31
30
29
28
27
26
25
24
23
22
21
20
18
19
17
L
Dotted Lines
Are External
Connections
0.01μF*
Analog Input
±10V
1.8M
Gain
Adjust
10k to
100k
Offset
Adjust
Status Output to
Control Logic
Serial Out
1μF
+5VDC
+15VDC
1μF
1μF
Analog
Common
–15VDC
Digital
Common
Convert Command From
Control Logic
*Capacitor should be connected even if external gain adjust is not used.
10k to
100k
Bipolar
Offset
ADC76
1μF
2k
+5
+
+
+
DISCUSSION
OF SPECIFICATIONS
The ADC76 is specified to meet critical performance criteria
for a wide variety of applications. The most critical specifi-
cations for an A/D converter are linearity, drift, gain and
offset errors, and conversion speed effects on accuracy. This
ADC is factory-trimmed and tested for all critical key
specifications.
GAIN AND OFFSET ERROR
Initial Gain and Offset errors are factory-trimmed to typi-
cally
±
0.1% of FSR (
±
0.05% for unipolar offset) at 25
°
C.
These errors may be trimmed to zero by connecting external
trim potentiometers as shown in
Figures 10 and 11.
POWER SUPPLY SENSITIVITY
Changes in the DC power supply voltages will affect accu-
racy. The ADC76 power supply sensitivity is specified at
±
0.003% of FSR/%V
for the
±
15V supplies and
±
0.0015%
of FSR/%V
for the +5V supply. Normally, regulated power
supplies with 1% or less ripple are recommended for use
with this ADC. See Layout Precautions, Power Supply
Decoupling, and
Figure 7.
LINEARITY ERROR
Linearity error is not adjustable and is the most meaningful
indicator of A/ D converter accuracy. Linearity is the devia-
tion of an actual bit transition from the ideal transition value
at any level over the range of the A/D converter.
DIFFERENTIAL LINEARITY ERROR
Differential linearity describes the step size between transi-
tion values. A differential linearity error of
±
0.003% of FSR
indicates that the size of any step may not vary from the ideal
step size by more than 0.003% of Full Scale Range.
ACCURACY VERSUS SPEED
In successive approximation A/D converters, the conver-
sion speed affects linearity and differential linearity errors.
Conversion speed and its effect on linearity and differential
linearity errors for the ADC76 are shown in
Figure 6.
FIGURE 6. Linearity Versus Conversion Time.
15
10
Conversion Time (μs)
0.01
0.006
0.003
0.001
L
E
Short Cycled to 13 Bits
1/2LSB 14 Bit
Short Cycled to 14 Bits
1/2LSB 13 Bit
11
12
13
14
FIGURE 5. ADC76 Connections for:
±
10V Analog Input, 14-Bit Resolution (Short-Cycled), Parallel Data Output.
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