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參數(shù)資料
| 型號(hào)： | ADC76B |
| 英文描述： | 16-Bit ANALOG-TO-DIGITAL CONVERTER |
| 中文描述： | 16位模擬數(shù)字轉(zhuǎn)換器 |
| 文件頁數(shù)： | 8/8頁 |
| 文件大?。?/td> | 113K |
| 代理商： | ADC76B |
ADC76
8
FIGURE 10. Two Methods of Connecting Optional Offset
Adjust.
FIGURE 11. Connecting Optional Gain Adjust.
Adjust the Offset potentiometer until the actual end point
transition voltage occurs at E
Off. The ideal transition
voltage values of the input are given in Table I.
Gain—Connect the Gain adjust potentiometer as shown in
Figure 11. Sweep the input through the end point transition
voltage; that should cause an output transition to all bits on
E
On. Adjust the Gain potentiometer until the actual end
point transition voltage occurs at E
IN
On.
Table I details the transition voltage levels required.
CONVERT COMMAND CONSIDERATIONS
Convert command resets the converter whenever taken high.
This insures a valid conversion on the first conversion after
power-up.
Convert command must stay low during a conversion unless
it is desired to reset the converter during a conversion.
OPTIONAL CONVERSION TIME ADJUSTMENT
The ADC76 may be operated with faster conversion times
for resolutions less than 14 bits by connecting the Short
Cycle (pin 32) as shown in Table III. Typical conversion
times for the resolution and connections are indicated.
Resolution (Bits)
16
15
14
13
12
Connect Pin 32 to
Open
Pin 16
Pin 15
Pin 14
Pin 13
Typical Conversion Time
17
μ
s
16
μ
s
15
μ
s
13
μ
s
12
μ
s
TABLE III. Short Cycle Connections for 12- to 16-Bit
Resolutions.
Clock Rate Control may be connected to an external multi-
turn trim potentiometer with a TCR of
±
10ppm/
°
C or less as
shown in Figure 12. The typical conversion time versus the
Clock Rate Control voltage is shown in Figure 13. The effect
of varying the conversion time and the resolution on Linear-
ity Error and Differential Linearity Error is shown in Figure
6.
FIGURE 12. Clock Rate Control, Optional Fine Adjust.
C
Control Voltage on Pin 23 (V)
0 2 4 6 8
20
15
10
Typical
14-Bit Operation
16-Bit Operation
FIGURE 13. Conversion Time vs Clock Rate Control
Voltage.
180k
+15VDC
–15VDC
10k to 100k
Offset Adjust
22k
(b)
1.8M
27
+15VDC
–15VDC
10k to 100k
Offset Adjust
(a)
Comparator In
27
Comparator In
180k
R1
R1
270k
22
+15VDC
–15VDC
10k to 100k
Gain Adjust
Gain Adjust
0.01μF
29
Analog Common
Clock Rate Control
+15VDC
5k
Internal Clock
Frequency Adjust
23
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相關(guān)代理商/技術(shù)參數(shù) |
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| ADC76J | 制造商:BB 制造商全稱:BB 功能描述:16-Bit ANALOG-TO-DIGITAL CONVERTER |
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