參數(shù)資料
型號: ADF4193BCPZ-RL7
廠商: ANALOG DEVICES INC
元件分類: XO, clock
英文描述: Low Phase Noise, Fast Settling PLL Frequency Synthesizer
中文描述: PLL FREQUENCY SYNTHESIZER, 3500 MHz, QCC32
封裝: 5 X 5 MM, ROHS COMPLIANT, MO-220VHHD-2, LFCSP-32
文件頁數(shù): 8/28頁
文件大?。?/td> 437K
代理商: ADF4193BCPZ-RL7
ADF4193
TYPICAL PERFORMANCE CHARACTERISTICS
Rev. B | Page 8 of 28
0
FREQ. UNIT
PARAM TYPE S
DATA FORMAT
GHz KEYWORD
IMPEDANCE 50
MA
R
FREQ.
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2.0
2.1
2.2
MAGS11
0.8897
0.87693
0.85834
0.85044
0.83494
0.81718
0.80229
0.78917
0.77598
0.75578
0.74437
0.73821
0.7253
0.71365
0.70699
0.7038
0.69284
0.67717
ANGS11
–16.6691
–19.9279
–23.561
–26.9578
–30.8201
–34.9499
–39.0436
–42.3623
–46.322
–50.3484
–54.3545
–57.3785
–60.695
–63.9152
–66.4365
–68.4453
–70.7986
–73.7038
FREQ.
2.3
2.4
2.5
2.6
2.7
2.8
2.9
3.0
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
4.0
MAGS11
0.67107
0.66556
0.6564
0.6333
0.61406
0.5977
0.5655
0.5428
0.51733
0.49909
0.47309
0.45694
0.44698
0.43589
0.42472
0.41175
0.41055
0.40983
ANGS11
–75.8206
–77.6851
–80.3101
–82.5082
–85.5623
–87.3513
–89.7605
–93.0239
–95.9754
–99.1291
–102.208
–106.794
–111.659
–117.986
–125.62
–133.291
–140.585
–147.97
Figure 4. S Parameter Data for the RF Input
0
FREQUENCY (Hz)
P
1k
10k
100k
1M
10M
–170
–160
–150
–140
–130
–120
–110
–100
–90
–80
–70
–60
–50
–40
–30
100M
GSM900 Rx SETUP, 40kHz LOOP BW, DITHER OFF
RF = 1092.8MHz, F
REF
= 26MHz, MOD = 130
N = 42 4/130
INTEGER BOUNDARY SPUR: –103dBc @ 800kHz
Figure 5. SSB Phase Noise Plot at 1092.8 MHz (GSM900 Rx Setup) vs.
Free Running VCO Noise
0
FREQUENCY (MHz)
S
1846
1859
–120
–110
–100
–90
–80
–70
–60
1872
400kHz SPURS @ 25
°
C
400kHz SPURS @ 85
°
C
DCS1800 Tx SETUP WITH DITHER OFF,
60kHz LOOP BW, 13MHz PFD.
MEASURED ON EVAL-ADF4193-EB1 BOARD
Figure 6. 400 kHz Fractional Spur Levels Across All DCS1800 Tx Channels over
Two-Integer Multiples of the PFD Reference
0
RF
IN
FREQUENCY (MHz)
Figure 7. RF Input Sensitivity
R
I
0
1000
2000
3000
4000
–35
0
–5
–10
–15
–20
–25
–30
5000
4/5 PRESCALER
8/9 PRESCALER
0
FREQUENCY (Hz)
P
1k
10k
100k
1M
10M
–170
–160
–150
–140
–130
–120
–110
–100
–90
–80
–70
–60
–50
–40
–30
100M
DCS1800 Tx SETUP, 60kHz LOOP BW, DITHER OFF
RF = 1842.6MHz, F
= 13MHz, MOD = 65
DSB INTEGRATED PHASE ERROR = 0.46° RMS
SIRENZA 1843T VCO
Figure 8. SSB Phase Noise Plot at 1842.6 MHz (DCS1800 Tx Setup)
0
FREQUENCY (MHz)
S
1846
1859
–120
–110
–100
–90
–80
–70
–60
1872
600kHz SPURS @ 25
°
C
600kHz SPURS @ 85
°
C
DCS1800 Tx SETUP WITH DITHER OFF,
60kHz LOOP BW, 13MHz PFD.
MEASURED ON EVAL-ADF4193-EB1 BOARD
Figure 9. 600 kHz Fractional Spur Levels Across All DCS1800 Tx Channels over
Two-Integer Multiples of the PFD Reference
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