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參數(shù)資料
型號(hào)： ADF4213BRU-REEL
廠商： Analog Devices Inc
文件頁數(shù)： 14/20頁
文件大?。?/td> 0K
描述： IC PLL FREQ SYNTHESIZER 20-TSSOP
產(chǎn)品變化通告： ADF4213,16 Discontinuation 15/May/2012
標(biāo)準(zhǔn)包裝： 2,500
類型： 時(shí)鐘/頻率合成器（RF/IF）
PLL： 是
輸入： CMOS，TTL
輸出： 時(shí)鐘
電路數(shù)： 1
比率 - 輸入:輸出： 3:1
差分 - 輸入:輸出： 是/無
頻率 - 最大： 3GHz
除法器/乘法器： 無/無
電源電壓： 2.7 V ~ 5.5 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 20-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 20-TSSOP
包裝： 帶卷 (TR)
REV. A
–3–
ADF4210/ADF4211/ADF4212/ADF4213
Parameter
B Version B Chips
2
Unit
Test Conditions/Comments
POWER SUPPLIES
VDD1
2.7/5.5
V min/V max
VDD2VDD1VDD1
VP
VDD1/6.0
V min/V max
VDD1, VDD2
6.0 V
IDD (RF + IF)
6
ADF4210
11.5
mA max
9.0 mA typical
ADF4211
15.0
mA max
11.0 mA typical
ADF4212
17.5
mA max
13.0 mA typical
ADF4213
20
mA max
15 mA typical
IDD (RF Only)
ADF4210
6.75
mA max
5.0 mA typical
ADF4211
10
mA max
7.0 mA typical
ADF4212
12.5
mA max
9.0 mA typical
ADF4213
15
mA max
11 mA typical
IDD (IF Only)
ADF4210
5.5
mA max
4.5 mA typical
ADF4211
5.5
mA max
4.5 mA typical
ADF4212
5.5
mA max
4.5 mA typical
ADF4213
5.5
mA max
4.5 mA typical
IP (IP1 + IP2)
1.0
mA max
TA = 25
°C, 0.55 mA typical
Low-Power Sleep Mode
1
A typ
NOISE CHARACTERISTICS
ADF4213 Phase Noise Floor
7
–171
dBc/Hz typ
@ 25 kHz PFD Frequency
–164
dBc/Hz typ
@ 200 kHz PFD Frequency
Phase Noise Performance
8
@ VCO Output
ADF4210/ADF4211, IF: 540 MHz Output
9
–91
dBc/Hz typ
@ 1 kHz Offset and 200 kHz PFD Frequency
ADF4212/ADF4213, IF: 900 MHz Output
10
–89
dBc/Hz typ
See Note 11
ADF4210/ADF4211, RF: 900 MHz Output
10
–89
dBc/Hz typ
See Note 11
ADF4212/ADF4213, RF: 900 MHz Output
10
–91
dBc/Hz typ
See Note 11
ADF4211/ADF4212, RF: 1750 MHz Output
12
–85
dBc/Hz typ
See Note 11
ADF4211/ADF4212, RF: 1750 MHz Output
13
–67
dBc/Hz typ
@ 200 Hz Offset and 10 kHz PFD Frequency
ADF4212/ADF4213, RF: 2400 MHz Output
14
–88
dBc/Hz typ
@ 1 kHz Offset and 1 MHz PFD Frequency
Spurious Signals
ADF4210/ADF4211, IF: 540 MHz Output
9
–88/–90
dB typ
@ 200 kHz/400 kHz and 200 kHz PFD Frequency
ADF4212/ADF4213, IF: 900 MHz Output
10
–90/–94
dB typ
See Note 11
ADF4210/ADF4211, RF: 900 MHz Output
10
–90/–94
dB typ
See Note 11
ADF4212/ADF4213, RF: 900 MHz Output
10
–90/–94
dB typ
See Note 11
ADF4211/ADF4212, RF: 1750 MHz Output
12
–80/–82
dB typ
See Note 11
ADF4211/ADF4212, RF: 1750 MHz Output
13
–65/–70
dB typ
@ 10 kHz/20 kHz and 10 kHz PFD Frequency
ADF4212/ADF4213, RF: 2400 MHz Output
14
–80/–82
dB typ
@ 200 kHz/400 kHz and 200 kHz PFD Frequency
NOTES
1Operating temperature range is as follows: B Version: –40
°C to +85°C.
2The B Chip specications are given as typical values.
3This is the maximum operating frequency of the CMOS counters. The prescaler value should be chosen to ensure that the IF/RF input is divided down to a frequency that is
less than this value.
4V
DD1 = VDD2 = 3 V; For VDD1 = VDD2 = 5 V, use CMOS-compatible levels, TA = 25
°C.
5Guaranteed by design. Sample tested to ensure compliance.
6V
DD = 3 V; P = 16; RFIN = 900 MHz; IFIN = 540 MHz, TA = 25
°C.
7The synthesizer phase noise floor is estimated by measuring the in-band phase noise at the output of the VCO and subtracting 20 logN (where N is the N divider value). See
TPC 16.
8The phase noise is measured with the EVAL-ADF4210/ADF4212/ADF4213EB Evaluation Board and the HP8562E Spectrum Analyzer. The spectrum analyzer provides the
REFIN for the synthesizer (fREFOUT = 10 MHz @ 0 dBm).
9f
REFIN = 10 MHz; fPFD = 200 kHz; Offset frequency = 1 kHz; fIF = 540 MHz; N = 2700; Loop B/W = 20 kHz.
10f
REFIN = 10 MHz; fPFD = 200 kHz; Offset frequency = 1 kHz; fRF = 900 MHz; N = 4500; Loop B/W = 20 kHz.
11Same conditions as listed in Note 10.
12f
REFIN = 10 MHz; fPFD = 200 kHz; Offset frequency = 1 kHz; fRF = 1750 MHz; N = 8750; Loop B/W = 20 kHz.
13f
REFIN = 10 MHz; fPFD = 10 kHz; Offset frequency = 200 Hz; fRF = 1750 MHz; N = 175000; Loop B/W = 1 kHz.
14f
REFIN = 10 MHz; fPFD = 1 MHz; Offset frequency = 1 kHz; fRF = 1960 MHz; N = 9800; Loop B/W = 20 kHz.
Specications subject to change without notice.
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