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| 型號： | ADG3249BRJ-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 12/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MUX/DEMUX 2X1 SOT23-8 |
| 產(chǎn)品培訓模塊： | Switch Fundamentals |
| 標準包裝： | 10,000 |
| 功能： | 多路復用器/多路分解器 |
| 電路： | 1 x 2:1 |
| 導通狀態(tài)電阻： | 12 歐姆 |
| 電壓電源： | 單電源 |
| 電壓 - 電源，單路/雙路(±)： | 2.3 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | SOT-23-8 |
| 供應商設備封裝： | SOT-23-8 |
| 包裝： | 帶卷 (TR) |
REV. 0
ADG3249
–9–
BUS SWITCH APPLICATIONS
Mixed Voltage Operation, Level Translation
Bus switches can provide an ideal solution for interfacing
between mixed voltage systems. The ADG3249 is suitable for
applications where voltage translation from 3.3 V technology to
a lower voltage technology is needed. This device can translate
from 2.5 V to 1.8 V, or bidirectionally from 3.3 V directly
to 2.5 V.
Figure 4 shows a block diagram of a typical application in which
a user needs to interface between a 3.3 V ADC and a 2.5 V
microprocessor. The microprocessor may not have 3.3 V toler-
ant inputs, therefore placing the ADG3249 between the two
devices allows the devices to communicate easily. The bus
switch directly connects the two blocks, thus introducing
minimal propagation delay, timing skew, or noise.
3.3V ADC
2.5V
3.3V
2.5V
MICROPROCESSOR
ADG3249
3.3V
Figure 4. Level Translation between a 3.3 V ADC
and a 2.5 V Microprocessor
3.3 V to 2.5 V Translation
When VCC is 3.3 V (SEL = 3.3 V) and the input signal range is
0 V to VCC, the maximum output signal will be clamped to
within a voltage threshold below the VCC supply. In this case,
the output will be limited to 2.5 V, as shown in Figure 6. This
device can be used for translation from 2.5 V to 3.3 V devices
and also between two 3.3 V devices.
ADG3249
2.5V
3.3V
2.5V
3.3V
Figure 5. 3.3 V to 2.5 V Voltage Translation,
SEL = V
CC
VIN
2.5V
VOUT
0V
3.3V
SWITCH
INPUT
S
WITCH
OU
TPUT
3.3V SUPPLY
SEL = 3.3V
Figure 6. 3.3 V to 2.5 V Voltage Translation,
SEL = V
CC
2.5 V to 1.8 V Translation
When VCC is 2.5 V (SEL = 2.5 V) and the input signal range is
0 V to VCC, the maximum output signal will, as before, be clamped
to within a voltage threshold below the VCC supply. In this case,
the output will be limited to approximately 1.8 V, as shown
in Figure 8.
ADG3249
1.8V
2.5V
Figure 7. 2.5 V to 1.8 V Voltage Translation,
SEL = 2.5 V
CC
VIN
1.8V
VOUT
0V
2.5V
SWITCH
INPUT
S
WITCH
OU
TPUT
2.5V SUPPLY
SEL = 2.5V
Figure 8. 2.5 V to 1.8 V Voltage Translation,
SEL = V
CC
3.3 V to 1.8 V Translation
The ADG3249 offers the option of interfacing between a 3.3 V
device and a 1.8 V device. This is possible through use of the
SEL pin. The SEL pin is an active low control pin. SEL acti-
vates internal circuitry in the ADG3242 that allows voltage
translation between 3.3 V devices and 1.8 V devices.
When VCC is 3.3 V and the input signal range is 0 V to VCC, the
maximum output signal will be clamped to 1.8 V, as shown in
Figure 9. To do this, the
SEL pin must be tied to Logic 0. If
SEL is unused, it should be tied directly to V
CC.
ADG3249
1.8V
3.3V
Figure 9. 3.3 V to 1.8 V Voltage Translation,
SEL = 0 V
VIN
1.8V
VOUT
0V
3.3V
SWITCH
INPUT
S
WITCH
OU
TPUT
3.3V SUPPLY
SEL = 0V
Figure 10. 3.3 V to 1.8 V Voltage Translation,
SEL = 0 V
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