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| 型號： | ADG3249BRJ-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 2/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MUX/DEMUX 2X1 SOT23-8 |
| 產(chǎn)品培訓(xùn)模塊： | Switch Fundamentals |
| 標(biāo)準(zhǔn)包裝： | 10,000 |
| 功能： | 多路復(fù)用器/多路分解器 |
| 電路： | 1 x 2:1 |
| 導(dǎo)通狀態(tài)電阻： | 12 歐姆 |
| 電壓電源： | 單電源 |
| 電壓 - 電源，單路/雙路(±)： | 2.3 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | SOT-23-8 |
| 供應(yīng)商設(shè)備封裝： | SOT-23-8 |
| 包裝： | 帶卷 (TR) |
REV. 0
–10–
ADG3249
Analog Switching
Bus switches can be used in many analog switching applications,
for example, video graphics. Bus switches can have lower on
resistance, smaller ON and OFF channel capacitance, and thus
improved frequency performance than their analog counterparts.
The bus switch channel itself, consisting solely of an NMOS
switch, limits the operating voltage (see TPC 1 for a typical
plot), but in many cases, this does not present an issue.
Multiplexing
Many systems, such as docking stations and memory banks,
have a large number of common bus signals. Common prob-
lems faced by designers of these systems include
Large delays caused by capacitive loading of the bus
Noise due to simultaneous switching of the address and data
bus signals
Figure 11 shows an array of memory banks in which each ad-
dress and data signal is loaded by the sum of the individual
loads. If a bus switch is used as shown in Figure 12, the output
load on the memory address and data bits is halved. The speed
at which the selected bank’s data can flow is much improved
because the capacitance loading is halved and the switches
introduce negligible propagation delay. Bus noise is also reduced.
High Impedance during Power-Up/Power-Down
To ensure the high impedance state during power-up or power-
down,
EN should be tied to V
CC through a pull-up resistor; the
minimum value of the resistor is determined by the current-
sinking capability of the driver.
MEMORY
ADDRESS
DATA
MEMORY
BANK B
MEMORY
BANK C
MEMORY
BANK D
MEMORY
BANK A
Figure 11. All Memory Banks Are Permanently
Connected to the Bus
MEMORY
ADDRESS
DATA
MEMORY
BANK B
MEMORY
BANK C
MEMORY
BANK D
MEMORY
BANK A
ADG3249
Figure 12. ADG3249 Used to Reduce Both Access
Time and Noise
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| ADG3249BRJ-REEL7 | 功能描述:IC MUX/DEMUX 2X1 SOT23-8 RoHS:否 類別:集成電路 (IC) >> 接口 - 模擬開關(guān)，多路復(fù)用器，多路分解器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 功能:多路復(fù)用器 電路:1 x 4:1 導(dǎo)通狀態(tài)電阻:- 電壓電源:雙電源 電壓 - 電源，單路/雙路(±):±5V 電流 - 電源:7mA 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR) |
| ADG3249BRJZ-REEL7 | 功能描述:IC MUX/DEMUX 2X1 SOT23-8 RoHS:是 類別:集成電路 (IC) >> 接口 - 模擬開關(guān)，多路復(fù)用器，多路分解器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 功能:多路復(fù)用器 電路:1 x 4:1 導(dǎo)通狀態(tài)電阻:- 電壓電源:雙電源 電壓 - 電源，單路/雙路(±):±5V 電流 - 電源:7mA 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR) |
| ADG3257 | 制造商:AD 制造商全稱:Analog Devices 功能描述:High Speed, 3.3 V/5 V Quad 2:1 Mux/Demux (4-Bit, 1 of 2) Bus Switch |
| ADG3257BRQ | 功能描述:IC MUX QUAD 3.3/5V HS 16-QSOP RoHS:否 類別:集成電路 (IC) >> 邏輯 - 信號開關(guān)，多路復(fù)用器，解碼器 系列:- 標(biāo)準(zhǔn)包裝:48 系列:74VHC 類型:多路復(fù)用器 電路:4 x 2:1 獨(dú)立電路:1 輸出電流高，低:8mA，8mA 電壓電源:單電源 電源電壓:2 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:管件 |
| ADG3257BRQ-REEL | 功能描述:IC MUX QUAD 3.3/5V HS 16-QSOP RoHS:否 類別:集成電路 (IC) >> 邏輯 - 信號開關(guān)，多路復(fù)用器，解碼器 系列:- 標(biāo)準(zhǔn)包裝:48 系列:74VHC 類型:多路復(fù)用器 電路:4 x 2:1 獨(dú)立電路:1 輸出電流高，低:8mA，8mA 電壓電源:單電源 電源電壓:2 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:管件 |
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