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參數(shù)資料
| 型號： | ADG715BRU-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 15/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SWITCH OCTAL SPST 24TSSOP |
| 產(chǎn)品培訓(xùn)模塊： | Switch Fundamentals |
| 標準包裝： | 1,000 |
| 功能： | 開關(guān) |
| 電路： | 8 x SPST - NO |
| 導(dǎo)通狀態(tài)電阻： | 4.5 歐姆 |
| 電壓電源： | 單/雙電源 |
| 電壓 - 電源，單路/雙路(±)： | 2.7 V ~ 5.5 V，±2.5V |
| 電流 - 電源： | 10µA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 24-TSSOP |
| 包裝： | 帶卷 (TR) |
ADG714/ADG715
–8–
REV.
ADG714 PIN FUNCTION DESCRIPTIONS
Pin No.
Mnemonic
Description
1
SCLK
Serial Clock Input. Data is clocked into the input shift register on the falling edge of the serial
clock input. These devices can accommodate serial input rates of up to 30 MHz.
2VDD
Positive Analog Supply Voltage.
3
DIN
Serial Data Input. Data is clocked into the 8-bit input register on the falling edge of the serial
clock input.
4
GND
Ground Reference
5, 7, 9, 11, 14,
Sx
Source. May be an input or output.
16, 18, 20
6, 8, 10, 12, 13,
Dx
Drain. May be an input or output.
15, 17, 19
21
VSS
Negative Analog Supply Voltage. For single supply operation this should be tied to GND.
22
DOUT
Serial Data Output. This allows a number a parts to be daisy chained. Data is clocked out of
the input shift register on the rising edge of SCLK. DOUT is an open-drain output that should be
pulled to the supply with an external pull-up resistor.
23
RESET
Active Low Control Input. Clears the input register and turns all switches to the OFF condition.
24
SYNC
Active Low Control Input. This is the frame synchronization signal for the input data. When
SYNC goes low, it powers on the SCLK and DIN buffers and the input shift register is enabled.
Data is transferred on the falling edges of the following clocks. Taking
SYNC high updates the
switches.
ADG715 PIN FUNCTION DESCRIPTIONS
Pin No.
Mnemonic
Description
1
SCL
Serial Clock Line. This is used in conjunction with the SDA line to clock data into the 8-bit
input shift register. Clock rates of up to 400 kbit/s can be accommodated with this 2-wire
serial interface.
2VDD
Positive Analog Supply Voltage
3
SDA
Serial Data Line. This is used in conjunction with the SCL line to clock data into the 8-bit input
shift register during the write cycle and used to readback one byte of data during the read cycle. It
is a bidirectional open-drain data line which should be pulled to the supply with an external pull-
up resistor.
4
GND
Ground Reference
5, 7, 9, 11, 14,
Sx
Source. May be an input or output.
16, 18, 20
6, 8, 10, 12, 13,
Dx
Drain. May be an input or output.
15, 17, 19
21
VSS
Negative Analog Supply Voltage. For single supply operation this should be tied to GND.
22
A1
Address Input. Sets the second least signicant bit of the 7-bit slave address.
23
RESET
Active Low Control Input. Clears the input register and turns all switches to the OFF condition.
24
A0
Address Input. Sets the least signicant bit of the 7-bit slave address.
C
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| ADG715BRUZ | 功能描述:IC SWITCH OCTAL SPST 24TSSOP RoHS:是 類別:集成電路 (IC) >> 接口 - 模擬開關(guān)，多路復(fù)用器，多路分解器 系列:- 特色產(chǎn)品:MicroPak? 標準包裝:1 系列:- 功能:開關(guān) 電路:2 x SPST - NC 導(dǎo)通狀態(tài)電阻:500 毫歐 電壓電源:單電源 電壓 - 電源，單路/雙路(±):1.4 V ~ 4.3 V 電流 - 電源:150nA 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:8-XFDFN 供應(yīng)商設(shè)備封裝:8-XSON，SOT833-1 （1.95x1） 包裝:Digi-Reel® 其它名稱:568-5557-6 |
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