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| 型號： | ADL5304ACPZ-R7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 19/32頁 |
| 文件大小： | 0K |
| 描述： | IC AMP LOG CONV 32LFCSP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | 對數(shù)轉(zhuǎn)換器 |
| 應(yīng)用： | 光纖 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 32-LFCSP-VQ（5x5） |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 其它名稱： | ADL5304ACPZ-R7DKR |
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ADL5304
Data Sheet
Rev. 0 | Page 26 of 32
Summing Node Voltage
It is important to reiterate that the VSM1 to VSM4, DCBI, and
INPS pins always need to be tied together. Failure to do so results
in erroneous outputs at VLOG.
The VSMx pins must be well decoupled to provide a good
ac ground.
Leakage
VSM2 and VSM3 are critical nodes because they are used by the
FET amplifiers to define the voltages on the INUM and IDEN pins.
Furthermore, the voltage applied to VSM2 and VSM3 is also used
to drive the shield around the inputs, which becomes critical at low
currents (<1 nA) to minimize leakage. A voltage difference
between the INUM and VSM2 pins of 1 mV together with a
leakage resistor of 100 MΩ results in a current of 10 pA. If the
current flows into the device, this leakage current limits the
lowest measurable input current.
Even worse, if the current is negative (that is, pulls current out
of the input pin), the input voltage pulls low, and the FET amp
output rails positive. This can happen rather easily when the input
is biased at 1.5 V. For example, a 1 GΩ resistor between the input
pin and ground generates a 1.5 nA current that flows from the
input pin to ground and thereby pulls the input nodes low. A
log amp input is unidirectional, and it can accept current in
only one direction. A current that flows in the wrong direction
breaks the loop that biases the inputs. For this reason, if currents
of less than about 1 nA are to be measured, it is critical that a
guard be used, and that the boards are cleaned of any contaminants
including solder flux. In the case where the leakage is so large
that it cannot be overcome by the input current, the VLOG output
rails to the negative or positive ends of the output range,
depending on whether it is INUM or IDEN that has the leakage.
VLOG Output
The VLOG output is somewhat sensitive to loading and does not
like to drive large capacitances or very small resistors, for this
reason, it is recommended to keep CLOAD < 5 pF and RLOAD > 10 kΩ.
Dynamic Response
The ADL5304 does not require input compensation networks to
stabilize the circuit. However, a negative going current can happen
during normal dynamic operation, for example, during current
steps that decreases from larger to smaller values. During a large
step, the input loop can temporarily open causing a transient
invalid VLOG output. Loop recovery time is directly related to the
input current; therefore, the smaller the input current, the longer it
takes for the ADL5304 to recover. Careful design that reduces
parasitic capacitance at the INUM and IDEN inputs helps to
reduce this recovery time; however, this behavior cannot be
eliminated because it is characteristic of translinear log amps.
Some pulse response measurement results with an actual photo-
diode (1A227, 0.8 A/W, 0.7 pF) are shown in Figure 56 and
094
59-
03
5
2.3
1.9
1.5
1.7
2.1
0.9
1.1
1.3
0.7
0.5
0
20
40
60
80
100
TIME (s)
V
LO
G
OU
T
P
U
T
(
V
)
LASER
LIMIT
1A
100nA
10nA
1nA
100pA
10pA
Figure 56. Photodiode Response for Input Currents of Approximately
10 pA to >1 μA Where Laser Limit Encountered
094
59
-034
1.3
1.1
0.9
0.7
0.5
0.3
0
2468
TIME (ms)
V
LO
G
OU
T
P
U
T
(
V
)
10
100pA
10pA
1pA
Figure 57. Increased Time Scale to Show Measurements Down to INUM ~ 1 pA
(~1.25 pW; 89.03 dBm)
USING A NEGATIVE SUPPLY
In most applications of the ADL5304, a single supply is adequate.
A single supply also provides the lowest power operation. Dual
supplies are needed if the user wants to bias the anode of the
photodiode at ground, as was shown in Figure 50.
The negative supply needs to absorb the device bias current, the
load current of the buffer, and the maximum input currents.
With the summing node moved to ground, the ADL5304 can be
used as a voltage-input log amp, using a suitably scaled resistor
from the voltage source to the INUM pin. The logarithmic
accuracy for small voltages is limited by the offset of the JFET
op amp, appearing between this pin and VSUM. The IDEN pin
can likewise be driven from a voltage signal.
When very large input currents (INUM or IDEN greater than
~5 mA) and very low temperatures (40°C) are expected, use a
negative voltage on VNEG.
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| ADL5304ACPZ-RL | 功能描述:IC AMP LOG CONV 32LFCSP RoHS:是 類別:集成電路 (IC) >> 線性 - 放大器 - 專用 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:60 系列:- 類型:可變增益放大器 應(yīng)用:CATV 安裝類型:表面貼裝 封裝/外殼:20-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:20-TQFN-EP（5x5） 包裝:托盤 |
| ADL5304-EVALZ | 功能描述:BOARD EVAL FOR ADL5304A RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:* 標(biāo)準(zhǔn)包裝:1 系列:- 主要目的:電信，線路接口單元（LIU） 嵌入式:- 已用 IC / 零件:IDT82V2081 主要屬性:T1/J1/E1 LIU 次要屬性:- 已供物品:板，電源，線纜，CD 其它名稱:82EBV2081 |
| ADL5305ACP-REEL | 制造商:Analog Devices 功能描述:LOGARITHMIC CONVERTER - Tape and Reel |
| ADL5306 | 制造商:AD 制造商全稱:Analog Devices 功能描述:60 dB Range (100 nA to 100 UA) Low Cost Logarithmic Converter |
| ADL5306ACP | 制造商:AD 制造商全稱:Analog Devices 功能描述:60 dB Range (100 nA to 100 UA) Low Cost Logarithmic Converter |
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