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| 型號： | ADL5317ACPZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 13/16頁 |
| 文件大?。?/td> | 541K |
| 描述： | IC CURRENT MONITOR 16LFCSP |
| 設計資源： | Interfacing ADL5317 High Side Current Mirror to a Translinear Logarithmic Amplifier in an Avalanche Photodiode Power Detector |
| 標準包裝： | 1 |
| 功能： | 電流監(jiān)控器 |
| 檢測方法： | 高端 |
| 輸入電壓： | 10 V ~ 80 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-VFQFN 裸露焊盤，CSP |
| 供應商設備封裝： | 16-LFCSP-VQ |
| 包裝： | 標準包裝 |
| 產品目錄頁面： | 772 (CN2011-ZH PDF) |
| 其它名稱： | ADL5317ACPZ-REEL7DKR |
ADL5317
Rev. 0 | Page 13 of 16
DP 8200
DC POWER SUPPLY
HP89410A
VECTOR SIGNAL
ANALYZER
+
+
+
VPHV
VAPD
VPLV
VSET
IPDM
ADL5317
+
+
+
+
+
33?/SPAN>F
604?/SPAN>
1k?/SPAN>
83nF
R1
GE 273
+
+9V
FET BUFFER
R
L
ALKALINE
D CELLS
ALKALINE
D CELL
ALKALINE
D CELLS
+9V
20k?/SPAN>
LNA
12V
+12V
Figure 26. Configuration for Noise Spectral Density and
Wideband Current Noise
TDS5104
ADL5317
EVALUATION BOARD
VAPD
FALT VPHV VPLV VSET VCLH
IPDM
DC SUPPLIES/DMM
1pF
R
C
R
C
AGILENT
33250A
Q1
AD8067
Figure 27. Configuration for Pulse Response from I
APD
to I
PDM
ADL5317
EVALUATION BOARD
VAPD
FALT VPHV VPLV IPDM VCLH
VSET
AGILENT
33250A
R
C
Q1
TDS5104
DC SUPPLIES/DMM
Figure 28. Configuration for Pulse Response from VSET to VAPD
NETWORK ANALYZER
OUTPUT R
B
A
POWER
SPLITTER
AD8138
EVAL BOARD
+
+
ADL5317
EVAL BOARD
VAPD
VSET
COMM
VPHV
VPLV
60V
5V
AD8045
1V
50?/SPAN>
R
F
IPDM
R
F
Figure 29. Configuration for Small Signal AC Response
The setup in Figure 26 is used to measure the output current
noise of the ADL5317. Batteries are used in numerous places to
minimize introduced noise and remove the uncertainty
resulting from the use of multiple dc supplies. In application,
properly bypassed dc supplies provide similar results. The load
resistor is chosen for each current to maximize signal-to-noise
ratio while maintaining measurement system bandwidth (when
combined with the low capacitance JFET buffer). The custom
LNA is used to overcome noise floor limitations in the
HP89410A signal analyzer.
Figure 27 shows the configuration used to measure the IAPD
pulse response. To create the test current pulse, Q1 is used in a
common base configuration with the Agilent 33250A, generating a
negative biased square wave with an amplitude that results in a
one decade current step on IPDM.
RC is chosen according to what current range is desired. Only
one cable is used between the Agilent 33250A and RC, while
everything else is connected with SMA connectors. A FET
scope probe connects the output of the AD8067 to the
TDS5104 input.
The configuration in Figure 28 is used to measure VAPD while
VSET is pulsed. Q1 and RC are used to generate the operating
current on the VAPD pin. An Agilent 33250A pulse generator is
used on the VSET pin to create a 1.6 V to 2.4 V square wave.
The capacitance on the GARD pin is 2 nF for this test.
The setup in Figure 29 is used to measure the frequency
response from I
APD
to I
PDM
. The AD8138 differential op amp
delivers a 1.250 V dc offset to bias the NPN transistor and to
have a 500 mV drop across RF. This voltage is modulated to a
depth of 5% of full scale over frequency. The voltage across RF
sets the dc operating point of IAPD. RF values are chosen to result
in decade changes in I
APD
. The output current at the IPDM pin
is fed into an AD8045 op amp configured to operate as a
transimpedance amplifier. The Feedback Resistor, R
F
, is the
same value as that on the output of the AD8138. Note that any
noise at the VSET input is amplified by the ADL5317 with a
gain of 30. This noise shows up on VAPD and causes errors
when measuring nanoamp current levels. This noise can be
filtered by use of the GARD pin. See the GARD Interface
section for more details.
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