參數(shù)資料
型號(hào)： ADM1024ARUZ-R7
廠商： ON Semiconductor
文件頁(yè)數(shù)： 14/30頁(yè)
文件大?。?/td> 0K
描述： IC MONITOR SYS TEMP/VOLT 24TSSOP
產(chǎn)品變化通告： MFG CHG Notification ADI to ON Semi
Product Discontinuation 30/Sept/2011
標(biāo)準(zhǔn)包裝： 1,000
應(yīng)用： PC，PDA
接口： 串行
電源電壓： 2.8 V ~ 5.5 V
封裝/外殼： 24-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 24-TSSOP
包裝： 帶卷 (TR)
安裝類型： 表面貼裝
ADM1024
http://onsemi.com
21
Temperature Interrupt Modes
The ADM1024 has two distinct methods of producing
interrupts for outoflimit temperature measurements from
the internal or external sensors. Temperature errors can
generate an interrupt on the INT pin along with other
interrupts, but there is also a separate THERM pin that
generates an interrupt only for temperature errors.
Operation of the INT output for temperature interrupts is
illustrated in Figure 33 Assuming that the temperature starts
off within the programmed limits and that temperature
interrupt sources are not masked, INT will go low if the
temperature measured by any of the internal or external
sensors exceeds the programmed high temperature limit for
that sensor, or the hardware limits in register 13h, 14h, 17h,
or 18h.
Figure 33. Operation of INT for Temperature
Interrupts
TEMP
HIGH LIMIT
LOW LIMIT
INT
1
1005C
905C
805C
705C
605C
505C
405C
ACPI
CONTROL METHODS
CLEAR EVENT
1ACPI AND DEFAULT CONTROL METHODS
ADJUST TEMPERATURE LIMIT VALUES.
Once the interrupt has been cleared, it will not be
reasserted even if the temperature remains above the high
limit(s). However, INT will be reasserted if:
The temperature falls below the low limit for the sensor;
or:
The high limit(s) is/are reprogrammed to a new value, and
the temperature then rises above the new high limit on the
next monitoring cycle;
or:
The THERM pin is pulled low externally, which sets Bit 5
of Interrupt Status Register 2;
or:
An interrupt is generated by another source.
Similarly, should the temperature measured by a sensor
start off within limits then fall below the low limit, INT will
be asserted. Once cleared, it will not be reasserted unless:
The temperature rises above the high limit;
or:
The low limit(s) is/are reprogrammed, and the temperature
then falls below the new low limit;
or:
The THERM pin is pulled low externally, which sets Bit 5
of Interrupt Status Register 2;
or:
An interrupt is generated by another source.
THERM Input/Output
The Thermal Management Input/Output (THERM) is a
logic input/output with an internal, 100 k
W pullup resistor,
that provides a separate output for temperature interrupts
only. It is enabled by setting Bit 2 of Configuration Register 1.
The THERM output has two operating modes that can be
programmed by Bit 3 of Configuration Register 2 (address
4Ah). With this bit set to the default value of 0, the THERM
output operates in “Default” interrupt mode. With this bit set
to 1, the THERM output operates in “ACPI” mode.
Thermal interrupts can still be generated at the INT output
while THERM is enabled, but if these are not required they can
be masked by writing a 1 to Bit 0 of Configuration Register 2
(address 4Ah). The THERM pin can also function as a logic
input for an external sensor, for example, a temperature sensor
such as the ADM22105 used in Figure 35. If THERM is taken
low by an external source, the analog output will be forced to
FFh to switch a controlled fan to maximum speed. This also
generates an INT output as previously described.
Default Mode
In Default mode, the THERM output operates like a
thermostat with hysteresis. THERM will go low and Bit 5 of
Interrupt Status Register 2 will be set, if the temperature
measured by any of the sensors exceeds the high limit
programmed for that sensor. It will remain asserted until
reset by reading Interrupt Status Register 2, by setting Bit 6
of Configuration Register 1, or when the temperature falls
below the low limit programmed for that sensor.
Figure 34. INT or THERM Output in Default Mode
TEMP
HIGH LIMIT
TEMP
LOW LIMIT
THERM
CLEARED BY
READ OR
THERM CLEAR
PROGRAMMED
VALUE
ANALOG
OUTPUT
CLEARED BY
TEMP FALLING
BELOW LOW
LIMIT
0xFF
EXT
THERM
INPUT
If THERM is cleared by reading the status register, it will
be reasserted after the next temperature reading and
comparison if it remains above the high limit.
If THERM is cleared by setting Bit 6 of Configuration
Register 1, it cannot be reasserted until this bit is cleared.
THERM will also be asserted if one of the hardware
temperature limits at addresses 13h, 14h, 17h, or 18h is
exceeded for three consecutive measurements. When this
happens, the analog output will be forced to FFh to boost a
controlled cooling fan to full speed.
Reading Status Register 1 will not clear THERM in this
case, because errors caused by exceeding the hardware
temperature limits are stored in a separate register that is not
cleared by reading the status register. In this case, THERM
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