參數(shù)資料
型號: ADM2484EBRWZ-REEL7
廠商: Analog Devices Inc
文件頁數(shù): 4/16頁
文件大?。?/td> 0K
描述: IC TXRX RS485 ISO W/ESD 16SOIC
標準包裝: 400
類型: 收發(fā)器
驅(qū)動器/接收器數(shù): 1/1
規(guī)程: RS422,RS485
電源電壓: 3 V ~ 3.6 V
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 16-SOIC W
包裝: 帶卷 (TR)
配用: EVAL-ADM2484EEBZ-ND - BOARD EVAL FOR ADM2484
ADM2484E
Data Sheet
Rev. D | Page 12 of 16
CIRCUIT DESCRIPTION
ELECTRICAL ISOLATION
In the ADM2484E, electrical isolation is implemented on the
logic side of the interface. Therefore, the part has two main
sections: a digital isolation section and a transceiver section
(see Figure 25). The driver input signal, which is applied to the
TxD pin and referenced to the logic ground (GND1), is coupled
across an isolation barrier to appear at the transceiver section
referenced to the isolated ground (GND2). Similarly, the
receiver input, which is referenced to the isolated ground in the
transceiver section, is coupled across the isolation barrier to
appear at the RxD pin referenced to the logic ground.
iCoupler Technology
The digital signals transmit across the isolation barrier using
iCoupler technology. This technique uses chip scale transformer
windings to couple the digital signals magnetically from one
side of the barrier to the other. Digital inputs are encoded into
waveforms that are capable of exciting the primary transformer
winding. At the secondary winding, the induced waveforms are
decoded into the binary value that was originally transmitted.
Positive and negative logic transitions at the input cause narrow
(~1 ns) pulses to be sent to the decoder via the transformer. The
decoder is bistable and is, therefore, set or reset by the pulses,
indicating input logic transitions. In the absence of logic
transitions at the input for more than ~1 μs, a periodic set of
refresh pulses, indicative of the correct input state, are sent to
ensure dc correctness at the output. If the decoder receives no
internal pulses for more than about 5 μs, then the input side is
assumed to be unpowered or nonfunctional, in which case the
output is forced to a default state (see Table 10).
ISOLATION
BARRIER
VDD2
VDD1
A
B
GND2
GND1
DE
RxD
RE
ENCODE
DECODE
ENCODE
R
TRANSCEIVER
DIGITAL ISOLATION
Y
Z
TxD
DECODE
ENCODE
D
06
984
-02
3
Figure 25. Digital Isolation and Transceiver Sections
TRUTH TABLES
The truth tables in this section use the abbreviations shown
Table 9. Truth Table Abbreviations
Letter
Description
H
High level
L
Low level
I
Indeterminate
X
Irrelevant
Z
High impedance (off )
NC
Disconnected
Table 10. Transmitting
Supply Status
Inputs
Outputs
VDD1
VDD2
DE
TxD
Y
Z
On
H
L
On
H
L
H
On
L
X
Z
On
Off
X
Z
Off
On
L
X
Z
Off
X
Z
Table 11. Receiving
Supply Status
Inputs
Output
VDD1
VDD2
A B (V)
RE
RxD
On
> 0.03
L or NC
H
On
< 0.2
L or NC
L
On
0.2 < A B < 0.03
L or NC
I
On
Inputs open
L or NC
H
On
X
H
Z
On
Off
X
L or NC
H
Off
X
L or NC
L
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