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參數(shù)資料
| 型號： | ADM3252EABCZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 2/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC LINE DRIVER/RECEIVER |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | * |
ADM3252E
Data Sheet
Rev. A | Page 10 of 16
THEORY OF OPERATION
Figure 15. Functional Block Diagram
The ADM3252E is a high speed, 2.5 kV, fully isolated, dual-
channel RS-232 transceiver device that operates from a single
power supply.
The internal circuitry consists of the following main sections:
Isolation of power and data
Charge pump voltage converter
3.3 V logic to EIA/TIA-232E transmitter
EIA/TIA-232E to 3.3 V logic receiver
ISOLATION OF POWER AND DATA
The ADM3252E incorporates a dc-to-dc converter section,
which works on principles that are common to most power
supply designs. VCC power is supplied to an oscillating circuit
that switches current into a chip scale air core transformer. Power
is transferred to the secondary side where it is rectified to a high
dc voltage. The power is then linearly regulated to 3.3 V and
supplied to the secondary side data section and to the VISO pin.
Because the oscillator runs at a constant high frequency
independent of the load, excess power is internally dissipated
in the output voltage regulation process. Limited space for
transformer coils and components adds to the internal power
dissipation. This results in low power conversion efficiency.
The transmitter input (TINx) accepts TTL/CMOS input levels.
The driver input signal that is applied to the TINx pins is
referenced to logic ground (GND). It is coupled across the
isolation barrier, inverted, and then appears at the transceiver
section, referenced to isolated ground (GNDISO).
Similarly, the receiver input (RINx) accepts RS-232 signal levels
referenced to isolated ground (GNDISO). The RINx input is
inverted and coupled across the isolation barrier to appear at
the ROUTx pin, referenced to logic ground (GND).
The digital signals are transmitted across the isolation barrier
using iCoupler technology. Chip scale transformer windings
couple the digital signals magnetically from one side of the
barrier to the other. Digital inputs are encoded into waveforms
that are capable of exciting the primary transformer of the winding.
At the secondary winding, the induced waveforms are decoded
into the binary value that was originally transmitted.
Figure 16. Typical Operating Circuit
RECT
REG
V–
C4
0.1F
16V
VOLTAGE
DOUBLER
C1+ C1– V+
VISO
C2+ C2–
VOLTAGE
INVERTER
VCC
GND
GNDISO
ADM3252E
OSC
DECODE
R
ROUT1
RIN1*
ENCODE
TIN1
T
TOUT1
ENCODE
DECODE
R
ROUT2
RIN2*
ENCODE
TIN2
T
TOUT2
ENCODE
DECODE
10
F
0.
1
F
C3
0.1F
10V
C2
0.1F
16V
0.1F
10F
C1
0.1F
16V
*INTERNAL 5k PULL-DOWN RESISTOR ON THE RS-232 INPUTS.
10
515-
0
03
+
C3
0.1F
10V
+ C1
0.1F
16V
+ C2
0.1F
16V
0.1F
+
C4
0.1F
16V
VISO
V+
C1+
C1–
EIA/TIA-232E OUTPUT
TOUT1
EIA/TIA-232E INPUT
RIN1
EIA/TIA-232E OUTPUT
TOUT2
EIA/TIA-232E INPUT
RIN2
C2+
C2–
V–
GNDISO
ISOLATION
BARRIER
CMOS OUTPUT
ROUT1
CMOS OUTPUT
ROUT2
CMOS INPUT
TIN1
CMOS INPUT
TIN2
GND
3.0V TO 5.5V
VCC
0.1F
10F
ADM3252E
10F
10
51
5-
0
04
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