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參數(shù)資料
| 型號(hào)： | ADM3252EABCZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 3/16頁 |
| 文件大小： | 0K |
| 描述： | IC LINE DRIVER/RECEIVER |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | * |
Data Sheet
ADM3252E
Rev. A | Page 11 of 16
CHARGE PUMP VOLTAGE CONVERTER
The charge pump voltage converter consists of a 200 kHz
oscillator and a switching matrix. The converter generates a
±6.6 V supply from the 3.3 V input level. This is achieved in
two stages by using a switched capacitor technique, as shown
Figure 17. Charge Pump Voltage Doubler
Figure 18. Charge Pump Voltage Inverter
In the first stage, the 3.3 V input supply is doubled to 6.6 V using
C1 as the charge storage element. In the second stage, the +6.6 V
level is inverted to generate 6.6 V using C2 as the storage element.
equally effective if C3 is connected between V+ and GNDISO.
Use Capacitor C3 and Capacitor C4 to reduce the output ripple.
Their values are not critical and can be increased, if needed.
Larger capacitors (up to 10 μF) can be used in place of C1, C2,
C3, and C4.
3.3 V LOGIC TO EIA/TIA-232E TRANSMITTER
The transmitter driver converts the 3.3 V logic input levels
into RS-232 output levels. When driving an RS-232 load with
VCC = 3.3 V, the output voltage swing is typically ±6.6 V.
EIA/TIA-232E TO 3.3 V LOGIC RECEIVER
The receiver is an inverting level shifter that accepts the RS-232
input level and translates it into a 3.3 V logic output level. The
input has an internal 5 kΩ pull-down resistor to ground and is
protected against overvoltages of up to ±30 V. An unconnected
input is pulled to 0 V by the internal 5 kΩ pull-down resistor,
resulting in a Logic 1 output level for an unconnected input or
for an input connected to GND. The receiver has a Schmitt
trigger input with a hysteresis level of 0.1 V. This ensures error
free reception for both a noisy input and for an input with slow
transition times.
HIGH BAUD RATE
The ADM3252E offers high slew rates, permitting data trans-
mission at rates well in excess of the EIA/TIA-232E specifications.
Higher data rates are possible when running at reduced RS-232
capacitive load levels. A smaller capacitive load, in effect, limits
the cable length. See Figure 7 for transmit output voltage levels
at 1 Mbps and Figure 19 for a scope plot at 1 Mbps.
Figure 19. Scope Plot, 1 Mbps Operation
GND
C3
C1
S1
S2
S3
S4
V+ = 2VISO
+
INTERNAL
OSCILLATOR
VISO
1
0515-
005
GNDISO
C4
C2
S1
S2
S3
S4
GNDISO
+
INTERNAL
OSCILLATOR
V+
V– = –(V+)
FROM
VOLTAGE
DOUBLER
10515-
006
105
15-
111
2
1
CH1 2.00V
CH2 2.00V
M400ns
A CH2
680mV
RL = 3k
CL = 470pF
Tx INPUT
Tx OUTPUT
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