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參數(shù)資料
| 型號： | ADN2525ACPZ-WP |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 其它接口 |
| 英文描述： | 10.7 Gbps Active Back-Termination, Differential Laser Diode Driver |
| 中文描述： | SPECIALTY INTERFACE CIRCUIT, QCC16 |
| 封裝： | 3 X 3 MM, LEAD FREE, MO-220VEED-2, LFCSP-16 |
| 文件頁數(shù)： | 11/16頁 |
| 文件大?。?/td> | 531K |
| 代理商： | ADN2525ACPZ-WP |
ADN2525
This dc current is switched by the data signal applied to the
input stage (DATAP and DATAN pins) and gained up by the
output stage to generate the differential modulation current at
the IMODP and IMODN pins.
Rev. 0 | Page 11 of 16
The output stage also generates the active back-termination,
which provides proper transmission line termination. Active
back-termination uses feedback around an active circuit to
synthesize a broadband termination resistance. This provides
excellent transmission line termination, while dissipating less
power than a traditional resistor passive back-termination. The
equivalent circuits for MSET, IMODP, and IMODN are shown
in Figure 26 and Figure 27.
0
VCC
MSET
800
200
VCC
Figure 26. Equivalent Circuit of the MSET Pin
0
VCC
VCC
3.3
3.3
25
IMODP
IMODN
25
Figure 27. Equivalent Circuit of the IMODP and IMODN Pins
The recommended configuration of the MSET, IMODP, and
IMODN pins is shown in Figure 28. See Table 5 for recom-
mended components.
0
ADN2525
MSET
VMSET
GND
IMODP
IBIAS
VCC
L
C
TOSA
L
IMODN
Z
0
= 25
Z
0
= 25
VCC
VCC
L
C
L
Z
0
= 25
Z
0
= 25
Figure 28. Recommended Configuration for the
MSET, IMODP, and IMODN Pins
The ratio between the voltage applied to the MSET pin and the
differential modulation current available at the IMODP and
IMODN pins is a function of the load resistance value as shown
in Figure 29.
0
DIFFERENTIAL LOAD RESISTANCE
55
0
5
10
15
20
25
30
35
40
45
50
m
210
200
190
180
170
160
150
140
130
120
110
100
90
80
70
60
MINIMUM
TYPICAL
MAXIMUM
Figure 29. MSET Voltage to Modulation Current Ratio vs.
Differential Load Resistance
Using the resistance of the TOSA, the user can calculate the
voltage range that should be applied to the MSET pin to generate
the required modulation current range (see the example in the
Applications Information section).
The circuit used to drive the MSET voltage must be able to
drive the 1 k resistance of the MSET pin. To be able to drive
80 mA modulation currents through the differential load, the
output stage of the ADN2525 (IMODP, IMODN pins) must be
ac-coupled to the load. The voltages at these pins have a dc
component equal to VCC, and an ac component with single-
ended peak-to-peak amplitude of IMOD
×
25 . This is the
case even if the load impedance is less than 50 differential,
since the transmission line characteristic impedance sets the
peak-to-peak amplitude. For proper operation of the output stage,
the voltages at the IMODP and IMODN pins must be between
the compliance voltage specifications for this pin over supply,
temperature, and modulation current range as shown in
Figure 30. See the Applications Information section for
example headroom calculations.
0
VIMODP, IMODN
VCC
VCC – 1.1V
VCC + 1.1V
NORMAL OPERATION REGION
Figure 30. Allowable Range for the Voltage at
IMODP and IMODN
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