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參數(shù)資料
| 型號(hào)： | ADN2804ACPZ-500RL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 4/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CLK/DATA REC 622MBPS 32-LFCSP |
| 標(biāo)準(zhǔn)包裝： | 500 |
| 類型： | 時(shí)鐘和數(shù)據(jù)恢復(fù)（CDR），多路復(fù)用器 |
| PLL： | 是 |
| 主要目的： | SONET/SDH |
| 輸入： | CML |
| 輸出： | LVDS |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:2 |
| 差分 - 輸入:輸出： | 是/是 |
| 頻率 - 最大： | 622MHz |
| 電源電壓： | 3 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 32-LFCSP-VQ（5x5） |
| 包裝： | 帶卷 (TR) |
ADN2804
Data Sheet
Rev. C | Page 12 of 24
TERMINOLOGY
Input Sensitivity and Input Overdrive
Sensitivity and overdrive specifications for the quantizer involve
offset voltage, gain, and noise. The relationship between the
logic output of the quantizer and the analog voltage input is
shown in Figure 12. For sufficiently large positive input voltage,
the output is always Logic 1; similarly, for negative inputs, the
output is always Logic 0. However, the transitions between
output Logic Level 1 and output Logic Level 0 are not at
precisely defined input voltage levels, but occur over a range of
input voltages. Within this range of input voltages, the output
may be either 1 or 0, or it may even fail to attain a valid logic
state. The width of this zone is determined by the input voltage
noise of the quantizer. The center of the zone is the quantizer
input offset voltage. Input overdrive is the magnitude of signal
required to guarantee the correct logic level with 1 × 1010
confidence level.
NOISE
OUTPUT
INPUT (V p-p)
OFFSET
OVERDRIVE
SENSITIVITY
(2 × OVERDRIVE)
1
0
058
01
-01
2
Figure 12. Input Sensitivity and Input Overdrive
Single-Ended vs. Differential
AC coupling is typically used to drive the inputs to the
quantizer. The inputs are internally dc biased to a common-
mode potential of ~2.5 V. Driving the ADN2804 in a single-
ended fashion and observing the quantizer input with an
oscilloscope probe at the point indicated in Figure 13 shows a
binary signal with an average value equal to the common-mode
potential and instantaneous values both above and below the
average value. It is convenient to measure the peak-to-peak
amplitude of this signal and call the minimum required value
the quantizer sensitivity. Referring to Figure 13, the sensitivity is
twice the overdrive because both positive and negative offsets
need to be accommodated. The ADN2804 quantizer typically
has 3.3 mV p-p sensitivity.
SCOPE
PROBE
PIN
2.5V
VREF
ADN2804
QUANTIZER
+
–
10mV p-p
VREF
05
80
1-
0
13
50
3k
50
Figure 13. Single-Ended Sensitivity Measurement
When the ADN2804 is driven differentially (see Figure 14),
sensitivity seems to improve if observing the quantizer input
with an oscilloscope probe. This is an illusion caused by the use
of a single-ended probe. A 5 mV p-p signal appears to drive the
ADN2804 quantizer; however, the single-ended probe measures
only half the signal. The true quantizer input signal is twice this
value, because the other quantizer input is a complementary
signal to the signal being observed.
SCOPE
PROBE
PIN
50
3k
2.5V
50
VREF
QUANTIZER
+
–
NIN
5mV p-p
VREF
5mV p-p
VREF
0
58
01
-0
14
Figure 14. Differential Sensitivity Measurement
LOS Response Time
LOS response time is the delay between removal of the input
signal and indication of loss of signal (LOS) at the LOS output,
Pin 22. When the inputs are dc-coupled, the LOS assert time of
the AD2804 is 500 ns typical and the deassert time is 400 ns
typical. In practice, the time constant produced by the ac
coupling at the quantizer input and the 50 Ω on-chip input
termination determines the LOS response time.
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