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參數(shù)資料
| 型號： | ADN2849SURF |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 其它接口 |
| 英文描述： | 10.7 Gbps Electro-Absorption Modulator Driver |
| 中文描述： | SPECIALTY INTERFACE CIRCUIT, UUC27 |
| 封裝： | 2.05 X 2.05 MM, DIE-27 |
| 文件頁數(shù)： | 10/17頁 |
| 文件大?。?/td> | 1425K |
| 代理商： | ADN2849SURF |
ADN2849
The capacitors used AC-coupling and the decoupling of the
VBB pin must have an impedance less than 50
over the
required operating frequency range. Generally this is achieved
using values from 10nF to 100nF.
Rev. Pr. G | Page 10 of 17
The retiming feature of the ADN2849 allows the user to remove
the data dependent jitter present on the DATAP and DATAN
pins by applying the data and clock signals to the ADN2849’s
internal latch. The retiming feature can be enabled or disabled
depending on the logic level applied to the CLK_SELB pin as
described in table 7. Note that any jitter present on the CLKP
and CLKN pins is added to the output.
Table 7.
CLK_SELB logic level
High
Low
Retiming function
Disabled
Enabled
If the retiming feature is disabled the CLKP and CLKN inputs
can be left floating.
The CLK_SELB is a 5V TTL and CMOS compatible digital
input. Its equivalent circuit is shown in figure 20.
CLK_SELB
180K
60K
40K
VEE
VEE
GND
GND
Figure 20. Equivalent circuit of the CLK_SELB pin
CROSS POINT ADJUST
The cross point adjust function allows the user to move the eye
crossing level in the modulation voltage to compensate for
asymmetry in the EA modulator electrical-to- optical transfer
function. Figure 21 shows an example on how the cross point
adjust can compensate the asymmetry of the EA modulator
transfer function. The 50% cross point in the optical eye can be
obtained in this case by moving the cross point of the signal
applied to the EA modulator away from the 50% point.
Optical
Output
Electrical
Input
Figure 21. Cross point adjust compensation
The cross point is controlled by the differential voltage applied
to the CPAP and CPAN pins. The equivalent circuit of the
CPAP and CPAN pins is shown in figure 22.
100
100
100
μ
A
100
μ
A
CPAP
CPAN
VEE
VEE
VEE
VEE
VEE
VEE
GND
GND
Figure 22. Equivalent circuit of the CPAP and CPAN pins
Preliminary Technical Data
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