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| 型號： | ADN2892ACPZ-RL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 1/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC AMP LIM 16LFCSP |
| 標(biāo)準(zhǔn)包裝： | 1,500 |
| 放大器類型： | 限制 |
| 電路數(shù)： | 1 |
| 輸出類型： | 差分 |
| -3db帶寬： | 1.5GHz |
| 電壓 - 輸入偏移： | 100µV |
| 電流 - 電源： | 48mA |
| 電壓 - 電源，單路/雙路(±)： | 2.9 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 95°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 16-LFCSP-VQ |
| 包裝： | 帶卷 (TR) |
3.3 V, 4.25 Gbps,
Limiting Amplifier
Data Sheet
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringementsof patentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
2005–2014 Analog Devices, Inc. All rights reserved.
FEATURES
Input sensitivity: 3.5 mV p-p
70 ps rise/fall times
CML outputs: 750 mV p-p differential
Bandwidth selectable for multirate 1×/2×/4× FC modules
Optional LOS output inversion
Programmable LOS detector: 3.5 mV to 35 mV
Rx signal strength indicator (RSSI)
SFF-8472-compliant average power measurement
Single-supply operation: 3.3 V
Low power dissipation: 160 mW
Available in space-saving, 3 mm × 3 mm, 16-lead LFCSP
Extended temperature range: 40°C to +95°C
SFP reference design available
APPLICATIONS
1×, 2×, and 4× FC transceivers
SFP/SFF/GBIC optical transceivers
GbE transceivers
Backplane receivers
GENERAL DESCRIPTION
The ADN2892 is a 4.25 Gbps limiting amplifier with integrated
loss of signal (LOS) detection circuitry and a received signal
strength indicator (RSSI). This part is optimized for Fibre
Channel (FC) and Gigabit Ethernet (GbE) optoelectronic
conversion applications. The ADN2892 has a differential input
sensitivity of 3.5 mV p-p and accepts up to a 2.0 V p-p
differential input overload voltage. The ADN2892 has current
mode logic (CML) outputs with controlled rise and fall times.
The ADN2892 has a selectable low-pass filter with a 3 dB
cutoff frequency of 1.5 GHz. By setting BW_SEL to Logic 0, the
filter can limit the relaxation oscillation of a low cost CD laser
used in a legacy 1 Gbps FC transmitter. The limited BW also
reduces the rms noise and in turn improves the receiver optical
sensitivity for a lower data rate application, such as 1× FC and
GbE.
By monitoring the bias current through a photodiode, the on-
chip RSSI detector measures the average power received with
2% typical linearity over the entire valid input range of the
photodiode. The on-chip RSSI detector facilitates SFF-8472-
compliant optical transceivers by eliminating the need for
external RSSI detector circuitry.
Additional features include a programmable loss-of-signal
(LOS) detector and output squelch. The ADN2892 is available
in a 3 mm × 3 mm, 16-lead LFCSP.
FUNCTIONAL BLOCK DIAGRAM
LPF
ADN2892
AVCC
AVEE
BW_SEL
SQUELCH
DRVCC
DRVEE
RSSI/LOS
DETECTOR
ADN2882
OUTP
OUTN
PIN
NIN
50
50
3.5k
VREF
50
50
PD_VCC
PD_CATHODE
LOS
RSSI_OUT
V+
10k
ADuC7020
THRADJ
LOS_INV
04986-001
Figure 1. RSSI Function Capable—Applications Setup Block Diagram
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