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參數資料
| 型號： | ADN8810-EVAL |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 12-Bit High Output Current Source |
| 中文描述： | 12位高輸出電流源 |
| 文件頁數： | 12/16頁 |
| 文件大?。?/td> | 232K |
| 代理商： | ADN8810-EVAL |
ADN8810
DAC to be updated. Up to eight ADN8810 devices with unique
addresses can be driven from the same serial data bus.
Rev. 0 | Page 12 of 16
Table 5 shows how the 16-bit DATA input word is divided into
an address byte and a data byte. The first four bits in the input
Table 5. Serial Data Input Examples
Address Byte
SDI Input
A3
A2
Ex. 1
0
1
Ex. 2
0
0
Ex. 3
0
1
word correspond to the address. Note that the first bit loaded
(A3) must always be zero. The remaining bits set the 12-bit data
byte for the DAC output. Three example inputs are
demonstrated.
Data Byte
D11
0
1
1
A1
1
0
0
A0
1
0
0
D10
0
0
1
D9
0
0
1
D8
0
0
1
D7
0
0
1
D6
0
0
1
D5
0
0
1
D4
0
0
1
D3
0
0
1
D2
0
0
1
D1
0
0
1
D0
0
0
1
Example 1:
This SDI input sets the device with an address of
111 to its minimum output current, 0 A. Connecting the
ADN8810 pins ADDR2, ADDR1, and ADDR0 to VDD sets this
address.
Example 2:
This input sets the device with an address of 000 to
a current equal to half of the full-scale output.
Example 3:
The ADN8810 with an address of 100 is set to full-
scale output.
STANDBY AND RESET MODES
Applying a logic low to the SB pin deactivates the ADN8810 and
puts the output into a high impedance state. The device
continues to draw 1.3 mA of typical supply current in standby.
Once logic high is reasserted on the SB pin, the output current
returns to its previous value within 6 μs.
Applying logic low to RESET will set the ADN8810 data register
to all zeros, bringing the output current to 0 A. Once RESET is
deasserted, the data register can be reloaded. Data cannot be
loaded into the device while it is in Standby or Reset mode.
POWER DISSIPATION
The power dissipation of the ADN8810 is equal to the output
current multiplied by the voltage drop from
PVDD
to the
output.
(
)
OUT
OUT
DISS
V
PVDD
I
P
S
OUT
R
I
×
×
=
2
(3)
The power dissipated by the ADN8810 will cause a temperature
increase in the device. For this reason,
PVDD
should be as low
as possible to minimize power dissipation.
While in operation, the ADN8810 die temperature, also known
as junction temperature, must remain below 150°C to prevent
damage. The junction temperature is approximately
DISS
P
JA
A
J
T
T
×
θ
+
=
(4)
where T
A
is the ambient temperature in °C, and θ
JA
is the
thermal resistance of the package (32°C/W).
Example 4
: A 300 mA full-scale output current is required to
drive a laser diode within an 85°C environment. The laser diode
has a 2 V drop and PVDD is 3.3 V.
Using Equation 3, the power dissipation in the ADN8810 is
found to be 267 mW. At T
A
= 85°C, this makes the junction
temperature 93.5°C, which is well below the 150°C limit. Note
that even with PVDD set to 5 V, the junction temperature would
increase to only 110°C.
USING MULTIPLE ADN8810
S
FOR ADDITIONAL
OUTPUT CURRENT
Connect multiple ADN8810 devices in parallel to increase the
available output current. Each device can deliver up to 300 mA
of current. To program all parallel devices simultaneously, set all
device addresses to the same address byte and drive all CS, SDI,
and CLK from the same serial data interface bus. The circuit in
Figure 18 uses two ADN8810 devices and delivers 600 mA to
the pump laser.
CS
SCLK
SERIAL
INTERFACE
(FROM
μ
C
OR DSP)
SDI
FB
IOUT
R
SN
R
S
1.37
R
S
1.37
ADDR2 ADDR1
ADN8810
ADDR0
CS
SCLK
SDI
FB
IOUT
D1
I
LD
600mA
R
SN
R
S
1.37
R
S
1.37
ADDR2 ADDR1
ADN8810
ADDR0
0
Figure 18. Using Multiple Devices for Additional Output Current
ADDING DITHER TO THE OUTPUT CURRENT
Some tunable laser applications require the laser diode bias
current to be modulated or dithered. This is accomplished by
dithering the V
REF
voltage input to the ADN8810. Figure 19
demonstrates one method.
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