參數(shù)資料
型號: ADP3162
廠商: Analog Devices, Inc.
英文描述: 5-Bit Programmable 2-Phase Synchronous Buck Controller
中文描述: 5位可編程2相同步降壓控制器
文件頁數(shù): 8/12頁
文件大小: 151K
代理商: ADP3162
REV. A
ADP3162
–5–
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
VCC
REF
GND
CT
COMP
PWM1
PWM2
PWRGD
CS–
CS+
FB
VID3
VID2
VID1
VID0
VID25
+
ADP3162
5-BIT CODE
1k
1 F
4.7nF
1.2V
12V
100nF
VFB
AD820
Figure 1. Closed-Loop Output Voltage Accuracy Test Circuit
Table I. Output Voltage vs. VID Code
VID25
VID3
VID2
VID1
VID0
VOUT(NOM)
00100
1.050 V
10100
1.075 V
00011
1.100 V
10011
1.125 V
00010
1.150 V
10010
1.175 V
00001
1.200 V
10001
1.225 V
00000
1.250 V
10000
1.275 V
01111
1.300 V
11111
1.325 V
01110
1.350 V
11110
1.375 V
01101
1.400 V
11101
1.425 V
01100
1.450 V
11100
1.475 V
01011
1.500 V
11011
1.525 V
01010
1.550 V
11010
1.575 V
01001
1.600 V
11001
1.625 V
01000
1.650 V
11000
1.675 V
00111
1.700 V
10111
1.725 V
00110
1.750 V
10110
1.775 V
00101
1.800 V
10101
1.825 V
THEORY OF OPERATION
The ADP3162 combines a current-mode, fixed frequency PWM
controller with antiphase logic outputs in a controller for a two-
phase synchronous buck power converter. Two-phase operation
is important for switching the high currents required by high
performance microprocessors. Handling the high current in a
single-phase converter would place difficult requirements on the
power components such as inductor wire size, MOSFET ON-
resistance and thermal dissipation. The ADP3162’s high side
current sensing topology ensures that the load currents are bal-
anced in each phase, such that neither phase has to carry more
than half of the power. An additional benefit of high side current
sensing over output current sensing is that the average current
through the sense resistor is reduced by the duty cycle of the
converter allowing the use of a lower power, lower cost resistor.
The outputs of the ADP3162 are logic drivers only and are
not intended to directly drive external power MOSFETs.
Instead, the ADP3162 should be paired with drivers such as
the ADP3412, ADP3413, or ADP3414.
The frequency of the ADP3162 is set by an external capacitor
connected to the CT pin. Each output phase of the ADP3162
operates at half of the frequency set by the CT pin. The error
amplifier and current sense comparator control the duty cycle of
the PWM outputs to maintain regulation. The maximum duty
cycle per phase is inherently limited to 50% because the PWM
outputs toggle in two-phase operation. While one phase is on,
the other phase is off. In no case can both outputs be high at the
same time.
Output Voltage Sensing
The output voltage is sensed at the FB pin allowing for remote
sensing. To maintain the accuracy of the remote sensing, the
GND pin should also be connected close to the load. A voltage
error amplier (gm) amplies the difference between the output
voltage and a programmable reference voltage. The reference
voltage is programmed between 1.05 V and 1.825 V by an internal
5-bit DAC, which reads the code at the voltage identication
(VID) pins. (Refer to Table I for the output voltage versus VID pin
code information.)
Active Voltage Positioning
The ADP3162 uses Analog Devices Optimal Positioning Tech-
nology (ADOPT), a unique supplemental regulation technique
that uses active voltage positioning and provides optimal com-
pensation for load transients. When implemented, ADOPT adjusts
the output voltage as a function of the load current, so that it is
always optimally positioned for a load transient. Standard (passive)
voltage positioning has poor dynamic performance, rendering
it ineffective under the stringent repetitive transient conditions
required by high performance processors. ADOPT, however,
provides optimal bandwidth for transient response that yields
optimal load transient response with the minimum number of
output capacitors.
Reference Output
A 3.0 V reference is available on the ADP3162. This reference
is normally used to set the voltage positioning accurately using a
resistor divider to the COMP pin. In addition, the reference can
be used for other functions such as generating a regulated voltage
with an external amplier. The reference is bypassed with a 1 nF
capacitor to ground. It is not intended to supply current to large
capacitive loads, and it should not be used to provide more than
1 mA of output current.
相關(guān)PDF資料
PDF描述
ADP3300ART-2.7-RL7 2.7 V FIXED POSITIVE LDO REGULATOR, 0.17 V DROPOUT, PDSO6
ADP3300ART-3-REEL7 3 V FIXED POSITIVE LDO REGULATOR, 0.17 V DROPOUT, PDSO6
ADP3300ART-3.3-RL7 3.3 V FIXED POSITIVE LDO REGULATOR, 0.17 V DROPOUT, PDSO6
ADP3300ART-5-REEL7 5.1 V FIXED POSITIVE LDO REGULATOR, 0.17 V DROPOUT, PDSO6
ADP3300ARTZ-2.7RL7 2.7 V FIXED POSITIVE LDO REGULATOR, 0.17 V DROPOUT, PDSO6
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADP3162JR 制造商:Rochester Electronics LLC 功能描述:5-BIT PROGRMBLE 2PHASE SYNC. BCK. CNTRLR - Bulk 制造商:Analog Devices 功能描述:
ADP3162JR-REEL 功能描述:IC REG BUCK 5BIT 2PHASE 16-SOIC RoHS:否 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - 專用型 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,000 系列:- 應(yīng)用:電源,ICERA E400,E450 輸入電壓:4.1 V ~ 5.5 V 輸出數(shù):10 輸出電壓:可編程 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:42-WFBGA,WLCSP 供應(yīng)商設(shè)備封裝:42-WLP 包裝:帶卷 (TR)
ADP3162JR-REEL7 制造商:Rochester Electronics LLC 功能描述:5-BIT PROGRMBLE 2PHASE SYNC. BCK. CNTRLR - Tape and Reel
adp3162jrz 制造商:Rochester Electronics LLC 功能描述:5-BIT PROGRMBLE 2PHASE SYNC. BCK. CNTRLR - Bulk 制造商:Analog Devices 功能描述:
ADP3162JRZ-REEL7 功能描述:IC REG BUCK 5BIT 2PHASE 16-SOIC RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - 專用型 系列:- 標準包裝:2,000 系列:- 應(yīng)用:控制器,DSP 輸入電壓:4.5 V ~ 25 V 輸出數(shù):2 輸出電壓:最低可調(diào)至 1.2V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:30-TFSOP(0.173",4.40mm 寬) 供應(yīng)商設(shè)備封裝:30-TSSOP 包裝:帶卷 (TR)