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ELECTRICAL CHARACTERISTICS
www.ti.com ............................................................................................................................................................. SLAS631A – APRIL 2009 – REVISED JULY 2009
Typical values are at 25°C, AVDD = 3.3V, DRVDD = 1.8V, sampling frequency = 200 MSPS, 50% clock duty cycle, –1dBFS
differential analog input, internal reference mode, SNRBoost disabled, 0dB gain, LVDS and CMOS interfaces unless
otherwise noted.
Min and max values are across the full temperature range TMIN = –40°C to TMAX = 85°C, AVDD = 3.3V, DRVDD = 1.8V
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Fin= 20 MHz
66.9
Fin = 70 MHz
66.6
SINAD
dBFS
Signal to Noise and Distortion Ratio
0 dB gain
63.5
65.7
Fin = 170 MHz
6 dB gain
64.2
Fin= 20 MHz
85
Fin = 70 MHz
83
SFDR
dBc
Spurious Free Dynamic Range
0 dB gain
73
78
Fin = 170 MHz
6 dB gain
81
Fin= 20 MHz
83
Fin = 70 MHz
81
THD
dBc
Total Harmonic Distortion
0 dB gain
71.5
75.5
Fin = 170 MHz
6 dB gain
79
Fin= 20 MHz
94
Fin = 70 MHz
90
HD2
dBc
Second Harmonic Distortion
0 dB gain
73
83
Fin = 170 MHz
6 dB gain
92
Fin= 20 MHz
85
Fin = 70 MHz
83
HD3
dBc
Third Harmonic Distortion
0 dB gain
73
78
Fin = 170 MHz
6 dB gain
81
Fin= 20 MHz
94
Worst Spur
Fin = 70 MHz
92
dBc
Other than second, third harmonics
Fin = 170 MHz
80
90
IMD
F1 = 185 MHz, F2 = 190 MHz, Each tone at –7 dBFS
87
dBFS
2-Tone Inter-modulation Distortion
Recovery to within 1% (of final value) for 6-dB overload with
1
clock
Input Overload recovery
sine wave input at Fclk/4
cycles
Cross-talk
Up to 200 MHz cross-talk frequency
90
dB
PSRR
For 100 mV pp signal on AVDD supply
25
dB
AC Power Supply Rejection Ratio
Copyright 2009, Texas Instruments Incorporated
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