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SERIAL INTERFACE TIMING CHARACTERISTICS
Serial Register Readout
www.ti.com ............................................................................................................................................................. SLAS631A – APRIL 2009 – REVISED JULY 2009
Typical values at 25°C, min and max values across the full temperature range TMIN = –40C to TMAX = 85°C, AVDD = 3.3V,
DRVDD = 1.8V, unless otherwise noted.
PARAMETER
MIN
TYP
MAX
UNIT
fSCLK
SCLK frequency (= 1/ tSCLK)
>DC
20
MHz
tSLOADS
SEN to SCLK setup time
25
ns
tSLOADH
SCLK to SEN hold time
25
ns
tDS
SDATA setup time
25
ns
tDH
SDATA hold time
25
ns
The device includes an option where the contents of the internal registers can be read back. This may be useful
as a diagnostic check to verify the serial interface communication between the external controller and the ADC.
a.
First, set register bit <SERIAL READOUT> = 1 to put the device in serial readout mode. This disables any further writes into the
registers, EXCEPT the register at address 0. Note that the <SERIAL READOUT> bit is also located in register 0. The device can exit
readout mode by writing <SERIAL READOUT> to 0. Also, only contents of register at adress 0 cannot be read in the register readout
mode.
b.
Initiate a serial interface cycle specifying the address of the register (A7–A0) whose content has to be read.
c.
The device outputs the contents (D7–D0) of the selected register on the SDOUT pin.
d.
The external controller can latch the contents at the falling edge of SCLK.
e.
To exit the serial readout mode, reset register bit <SERIAL READOUT> = 0, which enables writes into all registers of the device.
The serial register readout works with both CMOS and LVDS interfaces.
When <SERIAL READOUT> is disabled, SDOUT pin is forced low by the device (and not put in
high-impedance). If serial readout is not used, SDOUT pin has to be floated.
Copyright 2009, Texas Instruments Incorporated
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