- 您現在的位置：買賣IC網 > PDF目錄10370 > ADS62P44IRGCRG4 (Texas Instruments)IC ADC 14BIT SER/PAR 105M 64VQFN PDF資料下載
參數資料
| 型號： | ADS62P44IRGCRG4 |
| 廠商： | Texas Instruments |
| 文件頁數： | 68/78頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 14BIT SER/PAR 105M 64VQFN |
| 產品培訓模塊： | Data Converter Basics |
| 標準包裝： | 2,000 |
| 位數： | 14 |
| 采樣率（每秒）： | 105M |
| 數據接口： | 串行，并聯 |
| 轉換器數目： | 2 |
| 電壓電源： | 模擬和數字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 64-VFQFN 裸露焊盤 |
| 供應商設備封裝： | 64-VQFN 裸露焊盤（9x9） |
| 包裝： | 帶卷 (TR) |
| 輸入數目和類型： | 2 個差分，單極 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁當前第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁
SLAS561C
– JULY 2007 – REVISED FEBRUARY 2012
REVISION HISTORY
Changes from Revision A (February 2008) to Revision B
Page
Added Aperature delay matching to TIMING REQUIREMENTS
— LVDS AND CMOS MODES ........................................ 8
Added tSTART description to TIMING REQUIREMENTS — LVDS AND CMOS MODES ..................................................... 9
Added tDV description to TIMING REQUIREMENTS — LVDS AND CMOS MODES .......................................................... 9
Added tSTART_CHA description to TIMING REQUIREMENTS — LVDS AND CMOS MODES ............................................... 9
Added tDV_CHA description to TIMING REQUIREMENTS — LVDS AND CMOS MODES .................................................... 9
Added tSTART_CHB description to TIMING REQUIREMENTS — LVDS AND CMOS MODES ............................................... 9
Added tDV_CHB description to TIMING REQUIREMENTS — LVDS AND CMOS MODES .................................................... 9
Changed Figure 3 CMOS Mode Timing ............................................................................................................................. 12
Added Figure 4 Multiplexed Mode Timing (CMOS only) .................................................................................................... 12
Added text to USING PARALLEL INTERFACE CONTROL ONLY section description ..................................................... 13
Added voltage values to Table 4 ........................................................................................................................................ 14
Added voltage values to Table 5 ........................................................................................................................................ 14
Changed Channel A and B powered down to Power down global in Table 6 .................................................................... 14
Changed DB10 to DB0 to DB13 to DB0 inTable 6 ............................................................................................................. 14
Added Serial Register Readout section .............................................................................................................................. 17
Added SERIAL READOUT to register address 00 in Table 7 ............................................................................................ 20
Added SERIAL READOUT to register address 00 description ........................................................................................... 21
Changed register address 14, bits D2-D0 111 description from DA10 to DA0 to DB13 to DB0 pins ................................ 23
Changed pin 56 from NC to SDOUT in CMOS interface pinout ......................................................................................... 28
Changed pin 56 from NC to SDOUT and added SDOUT description in Pin Assignments (CMOS INTERFACE) ............ 29
Changed Channel A and B powered down to Global power down in Table 21 ................................................................. 55
Changed DA13 to DA0 to DB13 to DB0 in Table 21 .......................................................................................................... 55
Changed DB0-DB10 to DB0-DB13 in Multiplexed Output Mode description ..................................................................... 60
Changed DA0-DA10 to DA0-DA13 in Multiplexed Output Mode description ..................................................................... 60
Changes from Revision B (May 2009) to Revision C
Page
Changed label positions for DDR LVDS Output Data DXP, DXM in Figure 1 .................................................................... 11
Changed D3 for register 16 ................................................................................................................................................ 24
Changed pins 29, 30 and 19, 20 in CMOS interface pinout ............................................................................................... 28
Changed pins 29, 30 in Pin Assignments CMOS INTERFACE ......................................................................................... 29
Changed pins 19, 20 in Pin Assignments CMOS INTERFACE ......................................................................................... 29
Changed pins 29, 30 and 19, 20 in LVDS interface pinout ................................................................................................ 30
Changed pins 29, 30 in Pin Assignments LVDS INTERFACE ........................................................................................... 30
Changed pins 19, 20 in Pin Assignments LVDS INTERFACE ........................................................................................... 30
Changed rising edge to falling edge and falling edge to rising edge in paragraph after Figure 95. ................................... 57
70
Copyright
2007–2012, Texas Instruments Incorporated
Product Folder Link(s): ADS62P45, ADS62P44 ADS62P43, ADS62P42
相關PDF資料 |
PDF描述 |
|---|---|
| ADS62P44IRGCR | IC ADC 14BIT SER/PAR 105M 64VQFN |
| VE-B3L-MW-S | CONVERTER MOD DC/DC 28V 100W |
| VI-JNH-MY-B1 | CONVERTER MOD DC/DC 52V 50W |
| VE-B3J-MW-S | CONVERTER MOD DC/DC 36V 100W |
| VI-JN0-MY-B1 | CONVERTER MOD DC/DC 5V 50W |
相關代理商/技術參數 |
參數描述 |
|---|---|
| ADS62P44IRGCT | 功能描述:模數轉換器 - ADC Dual 14B 105MSPS ADC RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS62P44IRGCTG4 | 功能描述:模數轉換器 - ADC DUAL 14B 105MSPS Para ADC RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS62P44RGC | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Dual Channel 14-Bit, 125/105/80/65 MSPS ADC with Parallel CMOS/DDR LVDS outputs |
| ADS62P45 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Dual Channel 14-Bit, 125/105/80/65 MSPS ADC with Parallel CMOS/DDR LVDS outputs |
| ADS62P45_08 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:DUAL CHANNEL, 14-BITS, 125/105/80/65 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS |
發(fā)布緊急采購，3分鐘左右您將得到回復。