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參數(shù)資料
| 型號： | ADS6608A4A |
| 廠商： | ADATA Technology Co., Ltd. |
| 英文描述： | Synchronous DRAM(2M X 8 Bit X 4 Banks) |
| 中文描述： | 同步DRAM（2米× 8位× 4銀行） |
| 文件頁數(shù)： | 5/8頁 |
| 文件大?。?/td> | 522K |
| 代理商： | ADS6608A4A |
A-Data
ADS6608A4A
DC Characteristics II
Speed
Parameter
Symbol
Test condition
-7.5
Unit
Note
Operating Current
IDD1
Burst length=1, One bank active
tRC
≧
tRC(min),I
OL
=0mA
75
mA
1
IDD2P
CKE
≦
V
IL
(max), tCK=min
1
Precharge standby
current in power
down mode
IDD2PS CKE
≦
V
IL
(max), tCK=
∞
1
mA
IDD2N
CKE
≧
V
IH
(min), /CS
≧
V
IH
(min),
tCK=min input signals are
changed one time during 2clks.
All other pins
≧
VDD-0.2V or
≦
0.2V
15
Precharge standby
current in Non power
down mode
IDD2NS
CKE
≧
V
IH
(min), tCK=
∞
Input signals are stable.
6
mA
IDD3P
CKE
≦
V
IL
(max), tCK=min
3
Active standby
current in power
down mode
IDD3PS CKE
≦
V
IL
(max), tCK=
∞
3
mA
IDD3N
CKE
≧
V
IH
(min), /CS
≧
V
IH
(min),
tCK=min input signals are
changed one time during 2clks.
All other pins
≧
VDD-0.2V or
≦
0.2V
30
Active standby
current in Non power
down mode
IDD3NS
CKE
≧
V
IH
(min), tCK=
∞
Input signals are stable.
25
mA
Burst mode
operating current
IDD4
t
CK
≧
t
CK
(min),I
OL
=0 mA
All banks active
115
mA
1
Auto refresh current IDD5
tRRC
≧
tRRC(min), All banks
active
135
mA
2
Self refresh current IDD6
CKE
≦
0.2V
1
mA
Note:
1. IDD1 and IDD4 depend on output loading and cycle rates. Specified values are measured with the output
open.
2. Min. of tRRC is shown at AC characteristics.
Rev 1 April, 2001
5
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| ADS6608A4A-75 | 制造商:A-DATA 制造商全稱:A-DATA 功能描述:Synchronous DRAM(2M X 8 Bit X 4 Banks) |
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| ADS6616A4A-7 | 制造商:A-DATA 制造商全稱:A-DATA 功能描述:Synchronous DRAM(1M X 16 Bit X 4 Banks) |
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