These specifications apply to the interna" />
參數(shù)資料
型號： ADSP-21061KSZ-133
廠商： Analog Devices Inc
文件頁數(shù)： 10/52頁
文件大?。?/td> 0K
描述： IC DSP CONTROLLER 32BIT 240MQFP
產(chǎn)品培訓(xùn)模塊： SHARC Processor Overview
標(biāo)準(zhǔn)包裝： 1
系列： SHARC®
類型： 浮點(diǎn)
接口： 同步串行端口（SSP）
時鐘速率： 33MHz
非易失內(nèi)存： 外部
芯片上RAM： 128kB
電壓 - 輸入/輸出： 5.00V
電壓 - 核心： 5.00V
工作溫度： 0°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 240-BFQFP 裸露焊盤
供應(yīng)商設(shè)備封裝： 240-MQFP-EP（32x32）
包裝： 托盤
Rev. D | Page 18 of 52 | May 2013
INTERNAL POWER DISSIPATION (3.3 V)
These specifications apply to the internal power portion of VDD
only. See the Power Dissipation section of this data sheet for cal-
culation of external supply current and total supply current. For
a complete discussion of the code used to measure power dissi-
pation, see the technical note “SHARC Power Dissipation
Measurements.”
Specifications are based on the operating scenarios:
To estimate power consumption for a specific application, use
the following equation where % is the amount of time your pro-
gram spends in that state:
%PEAK IDDINPEAK + %HIGH IDDINHIGH + %LOW IDDINLOW + %IDLE
IDDIDLE = power consumption
Operation
Peak Activity (IDDINPEAK)
High Activity (IDDINHIGH)
Low Activity (IDDINLOW)
Instruction Type
Multifunction
Single Function
Instruction Fetch
Cache
Internal Memory
Core memory Access
2 per Cycle (DM and PM)
1 per Cycle (DM)
None
Internal Memory DMA
1 per Cycle
1 per 2 Cycles
Parameter
Test Conditions
Max
Unit
IDDINPEAK Supply Current (Internal)1
tCK = 25 ns, VDD = Max
tCK = 22.5 ns, VDD = Max
480
535
mA
IDDINHIGH Supply Current (Internal)2
tCK = 25 ns, VDD = Max
tCK = 22.5 ns, VDD = Max
380
425
mA
IDDINLOW Supply Current (Internal)3
tCK = 25 ns, VDD = Max
tCK = 22.5 ns, VDD = Max
220
245
mA
IDDIDLE Supply Current (Idle)4
IDDIDLE Supply Current (Idle)5
VDD = Max
180
50
mA
1 The test program used to measure IDDINPEAK represents worst-case processor operation and is not sustainable under normal application conditions. Actual internal power
measurements made using typical applications are less than specified.
2 IDDINHIGH is a composite average based on a range of high activity code. IDDINLOW is a composite average based on a range of low activity code.
3
IDDINLOW is a composite average based on a range of low activity code.
4 Idle denotes ADSP-21061L state during execution of IDLE instruction.
5 Idle16 denotes ADSP-21061L state during execution of IDLE16 instruction.
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參數(shù)描述
ADSP-21061KSZ-160 功能描述:IC DSP CONTROLLER 1MBIT 240MQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號處理器） 系列:SHARC® 標(biāo)準(zhǔn)包裝:40 系列:TMS320DM64x, DaVinci™ 類型:定點(diǎn) 接口:I²C，McASP，McBSP 時鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:160kB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:0°C ~ 90°C 安裝類型:表面貼裝 封裝/外殼:548-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:548-FCBGA（27x27） 包裝:托盤 配用:TMDSDMK642-0E-ND - DEVELPER KIT W/NTSC CAMERA296-23038-ND - DSP STARTER KIT FOR TMS320C6416296-23059-ND - FLASHBURN PORTING KIT296-23058-ND - EVAL MODULE FOR DM642TMDSDMK642-ND - DEVELOPER KIT W/NTSC CAMERA
ADSP-21061KSZ-200 功能描述:IC DSP CONTROLLER 32BIT 240MQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號處理器） 系列:SHARC® 標(biāo)準(zhǔn)包裝:40 系列:TMS320DM64x, DaVinci™ 類型:定點(diǎn) 接口:I²C，McASP，McBSP 時鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:160kB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:0°C ~ 90°C 安裝類型:表面貼裝 封裝/外殼:548-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:548-FCBGA（27x27） 包裝:托盤 配用:TMDSDMK642-0E-ND - DEVELPER KIT W/NTSC CAMERA296-23038-ND - DSP STARTER KIT FOR TMS320C6416296-23059-ND - FLASHBURN PORTING KIT296-23058-ND - EVAL MODULE FOR DM642TMDSDMK642-ND - DEVELOPER KIT W/NTSC CAMERA
ADSP-21061L 制造商:Analog Devices 功能描述:
ADSP-21061LAS-160 制造商:AD 制造商全稱:Analog Devices 功能描述:ADSP-2106x SHARC DSP Microcomputer Family
ADSP-21061LAS-176 制造商:Analog Devices 功能描述:DSP Floating-Point 32-Bit 44MHz 44MIPS 240-Pin MQFP Tray 制造商:Analog Devices 功能描述:IC MICROCOMPUTER DSP
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