- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄19473 > ADSP-2187NBSTZ-320 (Analog Devices Inc)IC DSP CONTROLLER 16BIT 100LQFP PDF資料下載
參數(shù)資料
| 型號： | ADSP-2187NBSTZ-320 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 9/48頁 |
| 文件大小： | 0K |
| 描述： | IC DSP CONTROLLER 16BIT 100LQFP |
| 標準包裝： | 1 |
| 系列： | ADSP-21xx |
| 類型： | 定點 |
| 接口： | 主機接口，串行端口 |
| 時鐘速率： | 80MHz |
| 非易失內(nèi)存： | 外部 |
| 芯片上RAM： | 160kB |
| 電壓 - 輸入/輸出： | 1.8V，2.5V，3.3V |
| 電壓 - 核心： | 1.90V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 100-LQFP |
| 供應商設備封裝： | 100-LQFP（14x14） |
| 包裝： | 托盤 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁當前第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁
ADSP-218xN
Rev. A
|
Page 17 of 48
|
August 2006
The EZ-ICE uses the EE (emulator enable) signal to take control
of the ADSP-218xN in the target system. This causes the proces-
sor to use its ERESET, EBR, and EBG pins instead of the RESET,
BR, and BG pins. The BG output is three-stated. These signals
do not need to be jumper-isolated in the system.
The EZ-ICE connects to the target system via a ribbon cable and
a 14-pin female plug. The female plug is plugged onto the 14-
pin connector (a pin strip header) on the target board.
Target Board Connector for EZ-ICE Probe
The EZ-ICE connector (a standard pin strip header) is shown in
Figure 16. This connector must be added to the target board
design to use the EZ-ICE. Be sure to allow enough room in the
system to fit the EZ-ICE probe onto the 14-pin connector.
The 14-pin, 2-row pin strip header is keyed at the Pin 7 loca-
tion—Pin 7 must be removed from the header. The pins must
be 0.025 inch square and at least 0.20 inch in length. Pin spacing
should be 0.1
0.1 inch. The pin strip header must have at least
0.15 inch clearance on all sides to accept the EZ-ICE probe plug.
Pin strip headers are available from vendors such as 3M,
McKenzie, and Samtec.
Target Memory Interface
For the target system to be compatible with the EZ-ICE emula-
tor, it must comply with the following memory interface
guidelines:
Design the Program Memory (PM), Data Memory (DM), Byte
Memory (BM), I/O Memory (IOM), and Composite Memory
(CM) external interfaces to comply with worst-case device
timing requirements and switching characteristics as specified
in this data sheet. The performance of the EZ-ICE may
approach published worst-case specification for some memory
access timing requirements and switching characteristics.
Note:
If the target does not meet the worst-case chip specifica-
tion for memory access parameters, the circuitry may not be
able to be emulated at the desired CLKIN frequency. Depending
on the severity of the specification violation, the system may be
difficult to manufacture, as DSP components statistically vary in
switching characteristic and timing requirements, within pub-
lished limits.
Restriction:
All memory strobe signals on the ADSP-218xN
(RD, WR, PMS, DMS, BMS, CMS, and IOMS) used in the target
system must have 10 kΩ pull-up resistors connected when the
EZ-ICE is being used. The pull-up resistors are necessary
because there are no internal pull-ups to guarantee their state
during prolonged three-state conditions resulting from typical
EZ-ICE debugging sessions. These resistors may be removed
when the EZ-ICE is not being used.
Target System Interface Signals
When the EZ-ICE board is installed, the performance on some
system signals changes. Design the system to be compatible with
the following system interface signal changes introduced by the
EZ-ICE board:
EZ-ICE emulation introduces an 8 ns propagation
delay between the target circuitry and the DSP on the
RESET signal.
EZ-ICE emulation introduces an 8 ns propagation
delay between the target circuitry and the DSP on the BR
signal.
EZ-ICE emulation ignores RESET and BR, when
single-stepping.
EZ-ICE emulation ignores RESET and BR when in Emula-
tor Space (DSP halted).
EZ-ICE emulation ignores the state of target BR in certain
modes. As a result, the target system may take control of
the DSP’s external memory bus only if bus grant (BG) is
asserted by the EZ-ICE board’s DSP.
ADDITIONAL INFORMATION
This data sheet provides a general overview of ADSP-218xN
series functionality. For additional information on the architec-
ture and instruction set of the processor, refer to the ADSP-218x
DSP Hardware Reference and the ADSP-218x DSP Instruction
Set Reference.
Figure 16. Target Board Connector for EZ-ICE
1
2
3
4
56
7
8
910
11
12
13
14
GND
KEY (NO PIN)
RESET
BR
BG
TOP VIEW
EBG
EBR
ELOUT
EE
EINT
ELIN
ECLK
EMS
ERESET
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ACM28DTBS | CONN EDGECARD 56POS R/A .156 SLD |
| ADSP-2187NKSTZ-320 | IC DSP CONTROLLER 16BIT 100LQFP |
| ECC22DJWN-S1136 | CONN EDGECARD 44PS .100 PRESSFIT |
| NML1212SC | CONV DC/DC 2W 12VIN 12VOUT SIP |
| VI-B1V-CX-B1 | CONVERTER MOD DC/DC 5.8V 75W |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADSP-2187NBSTZ-3202 | 制造商:AD 制造商全稱:Analog Devices 功能描述:DSP Microcomputer |
| ADSP-2187NKCA-320 | 制造商:Analog Devices 功能描述:DSP Fixed-Point 16-Bit 80MHz 80MIPS 144-Pin CSP-BGA 制造商:Rochester Electronics LLC 功能描述:32K PM/32K DM RAM,16-BIT,80 MIPS, 1.8V - Bulk |
| ADSP-2187NKST-320 | 制造商:Rochester Electronics LLC 功能描述:32K PM/32K DM RAM,16-BIT, 80 MIPS, 1.8V - Bulk 制造商:Analog Devices 功能描述:IC MICROCOMPUTER 16-BIT |
| ADSP-2187NKSTZ-320 | 功能描述:IC DSP CONTROLLER 16BIT 100LQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號處理器） 系列:ADSP-21xx 標準包裝:40 系列:TMS320DM64x, DaVinci™ 類型:定點 接口:I²C，McASP，McBSP 時鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:160kB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:0°C ~ 90°C 安裝類型:表面貼裝 封裝/外殼:548-BBGA，F(xiàn)CBGA 供應商設備封裝:548-FCBGA（27x27） 包裝:托盤 配用:TMDSDMK642-0E-ND - DEVELPER KIT W/NTSC CAMERA296-23038-ND - DSP STARTER KIT FOR TMS320C6416296-23059-ND - FLASHBURN PORTING KIT296-23058-ND - EVAL MODULE FOR DM642TMDSDMK642-ND - DEVELOPER KIT W/NTSC CAMERA |
| ADSP-2187NKSTZ-3202 | 制造商:AD 制造商全稱:Analog Devices 功能描述:DSP Microcomputer |
發(fā)布緊急采購，3分鐘左右您將得到回復。