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參數(shù)資料
| 型號： | ADSP-BF506BSWZ-3F |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 13/80頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DSP 400MHZ 1.4V 120LQFP |
| 視頻文件： | Blackfin? BF50x Processor Family |
| 標準包裝： | 1 |
| 系列： | Blackfin® |
| 類型： | 定點 |
| 接口： | CAN，EBI/EMI，I²C，IrDA，PPI，SPI，SPORT，UART/USART |
| 時鐘速率： | 300MHz |
| 非易失內(nèi)存： | 閃存（16MB） |
| 芯片上RAM： | 68kB |
| 電壓 - 輸入/輸出： | 3.30V |
| 電壓 - 核心： | 1.29V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 120-LQFP 裸露焊盤 |
| 供應商設備封裝： | 120-LQFP-EP（14x14） |
| 包裝： | 托盤 |
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Rev. A
|
Page 20 of 80
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July 2011
ADSP-BF504/ADSP-BF504F/ADSP-BF506F
Additional highlights of the internal ADC include:
Two complete ADC functions allow simultaneous sam-
pling and conversion of two channels—Each ADC has
three fully/pseudo differential pairs, or six single-ended
channels, as programmed. The conversion result of both
channels is simultaneously available on separate data lines,
or in succession on one data line if only one serial connec-
tion is available.
High throughput with low power consumption
The internal ADC offers both a standard 0 V to VREF input
range and a 2 × VREF input range.
No pipeline delay—The part features two standard succes-
sive approximation ADCs with accurate control of the
sampling instant via a CS input and once off conversion
control.
ADC APPLICATION HINTS
The following sections provide application hints for using the
ADC.
Grounding and Layout Considerations
The analog and digital supplies to the ADC are independent and
separately pinned out to minimize coupling between the analog
and digital sections of the device. The printed circuit board
(PCB) that houses the ADC should be designed so that the ana-
log and digital sections are separated and confined to certain
areas of the board. This design facilitates the use of ground
planes that can be easily separated.
To provide optimum shielding for ground planes, a minimum
etch technique is generally best. All AGND pins should be sunk
in the AGND plane. Digital and analog ground planes should be
joined in only one place. If the ADC is in a system where multi-
ple devices require an AGND to DGND connection, the
connection should still be made at one point only, a star ground
point that should be established as close as possible to the
ground pins on the ADC.
Avoid running digital lines under the device as this couples
noise onto the die. Avoid running digital lines in the area of the
AGND pad as this couples noise onto the ADC die and into the
AGND plane. The power supply lines to the ADC should use as
large a trace as possible to provide low impedance paths and
reduce the effects of glitches on the power supply line.
To avoid radiating noise to other sections of the board, fast
switching signals, such as clocks, should be shielded with digital
ground, and clock signals should never run near the analog
inputs. Avoid crossover of digital and analog signals. To reduce
the effects of feed through within the board, traces on opposite
sides of the board should run at right angles to each other.
Good decoupling is also important. All analog supplies should
be decoupled with 10 μF tantalum capacitors in parallel with
0.1 μF capacitors to GND. To achieve the best results from these
decoupling components, they must be placed as close as possible
to the device, ideally right up against the device. The 0.1 μF
capacitors should have low effective series resistance (ESR) and
effective series inductance (ESI), such as the common ceramic
types or surface-mount types. These low ESR and ESI capacitors
provide a low impedance path to ground at high frequencies to
handle transient currents due to internal logic switching.
RELATED DOCUMENTS
The following publications that describe the ADSP-BF50x pro-
cessors (and related processors) can be ordered from any
Analog Devices sales office or accessed electronically on our
website:
Getting Started With Blackfin Processors
ADSP-BF50x Blackfin Processor Hardware Reference (vol-
umes 1 and 2)
Blackfin Processor Programming Reference
ADSP-BF50x Blackfin Processor Anomaly List
RELATED SIGNAL CHAINS
A signal chain is a series of signal-conditioning electronic com-
ponents that receive input (data acquired from sampling either
real-time phenomena or from stored data) in tandem, with the
output of one portion of the chain supplying input to the next.
Signal chains are often used in signal processing applications to
gather and process data or to apply system controls based on
analysis of real-time phenomena. For more information about
this term and related topics, see the “signal chain” entry in
Wikipedia or the Glossary of EE Terms on the Analog Devices
website.
Analog Devices eases signal processing system development by
providing signal processing components that are designed to
work together well. A tool for viewing relationships between
specific applications and related components is available on the
www.analog.com website.
The Application Signal Chains page in the Circuits from the
Lab
TM site (http:\\www.analog.com\signalchains) provides:
Graphical circuit block diagram presentation of signal
chains for a variety of circuit types and applications
Drill down links for components in each chain to selection
guides and application information
Reference designs applying best practice design techniques
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| ADSP-BF506BSWZ-4F | 功能描述:IC DSP 400MHZ 1.4V 120LQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號處理器） 系列:Blackfin® 標準包裝:40 系列:TMS320DM64x, DaVinci™ 類型:定點 接口:I²C，McASP，McBSP 時鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:160kB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:0°C ~ 90°C 安裝類型:表面貼裝 封裝/外殼:548-BBGA，F(xiàn)CBGA 供應商設備封裝:548-FCBGA（27x27） 包裝:托盤 配用:TMDSDMK642-0E-ND - DEVELPER KIT W/NTSC CAMERA296-23038-ND - DSP STARTER KIT FOR TMS320C6416296-23059-ND - FLASHBURN PORTING KIT296-23058-ND - EVAL MODULE FOR DM642TMDSDMK642-ND - DEVELOPER KIT W/NTSC CAMERA |
| ADSP-BF506BSWZ-4FX | 制造商:Analog Devices 功能描述:- Trays |
| ADSP-BF506F | 制造商:Analog Devices 功能描述:LOW POWER BLACKFIN WITH ADVANCED EMBEDDED CONNECTIVITY - Bulk |
| ADSPBF506FBSWZ-ENG | 制造商:Analog Devices 功能描述:- Trays |
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