參數(shù)資料
型號(hào)： ADSP-BF592KCPZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 7/44頁(yè)
文件大?。?/td> 0K
描述： IC DSP CTRLR 64LFCSP
視頻文件： Blackfin? BF592 Introduction
特色產(chǎn)品： Blackfin Embedded Processor
標(biāo)準(zhǔn)包裝： 1
系列： Blackfin®
類(lèi)型： 定點(diǎn)
接口： I²C，I²S，IrDA，PPI，SPI，SPORT，UART
時(shí)鐘速率： 400MHz
非易失內(nèi)存： ROM（64 kB）
芯片上RAM： 64kB
電壓 - 輸入/輸出： 1.8V，2.5V，3.3V
電壓 - 核心： 1.29V
工作溫度： 0°C ~ 70°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 64-VFQFN 裸露焊盤(pán)，CSP
供應(yīng)商設(shè)備封裝： 64-LFCSP-VQ（9x9）
包裝： 托盤(pán)
Rev. B
|
Page 15 of 44
|
July 2013
PG10–GPIO/SPI1_MISO/PPI_D2
I/O GPIO/SPI1 Master In Slave Out/PPI Data 2
(This pin should always be pulled high through a 4.7 kΩ resistor if booting via
the SPI port.)
A
PG11–GPIO/SPI1_SSEL5/PPI_D3
I/O GPIO/SPI1 Slave Select Enable 5/PPI Data 3
A
PG12–GPIO/SPI1_SSEL2/PPI_D4/WAKEN2
I/O GPIO/SPI1 Slave Select Enable 2 Output/PPI Data 4/Wake Enable 2
A
PG13–GPIO/SPI1_SSEL1/SPI1_SS/PPI_D5
I/O GPIO/SPI1 Slave Select Enable 1 Output/PPI Data 5/SPI1 Slave Select Input
A
PG14–GPIO/SPI1_SSEL4/PPI_D6/TACLK1
I/O GPIO/SPI1 Slave Select Enable 4/PPI Data 6/Timer 1 Auxiliary Clock Input
A
PG15–GPIO/SPI1_SSEL6/PPI_D7/TACLK2
I/O GPIO/SPI1 Slave Select Enable 6/PPI Data 7/Timer 2 Auxiliary Clock Input
A
TWI
SCL
I/O TWI Serial Clock (This signal is an open-drain output and requires a pull-up
resistor. Consult version 2.1 of the I2C specification for the proper resistor
value.)
B
SDA
I/O TWI Serial Data (This signal is an open-drain output and requires a pull-up
resistor. Consult version 2.1 of the I
2C specification for the proper resistor
value.)
B
JTAG Port
TCK
I
JTAG CLK
TDO
O
JTAG Serial Data Out
A
TDI
I
JTAG Serial Data In
TMS
I
JTAG Mode Select
TRST
IJTAG Reset
(This lead should be pulled low if the JTAG port is not used.)
EMU
O
Emulation Output
A
Clock
CLKIN
I
CLK /Crystal In
XTAL
O
Crystal Output
EXTCLK
O
External Clock Output pin/System Clock Output
C
Mode Controls
RESET
I
Reset
NMI
I
Nonmaskable Interrupt
(This leadshouldbepulledhigh whennot used.)
BMODE2–0
I
Boot Mode Strap 2–0
PPI_CLK
I
PPI Clock Input
External Regulator Control
PG
I
Power Good indication
EXT_WAKE
O
Wake up Indication
A
Power Supplies
ALL SUPPLIES MUST BE POWERED
VDDEXT
PI /O Power Supply
VDDINT
P
Internal Power Supply
GND
G
Ground for All Supplies (Back Side of LFCSP Package.)
Table 7. Signal Descriptions (Continued)
Signal Name
Type Function
Driver
Type
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