參數(shù)資料
型號(hào): ADSP2103
英文描述: (666.40 k)
中文描述: (666.40十一)
文件頁(yè)數(shù): 45/64頁(yè)
文件大?。?/td> 666K
代理商: ADSP2103
ADSP-21xx
REV. B
–45–
Frequency
Dependency
Min
10.24 MHz
Min
Parameter
Max
Max
Unit
Timing Requirement:
t
CK
CLKIN Period
t
CKL
CLKIN Width Low
t
CKH
CLKIN Width High
t
RSP
RESET Width Low
Switching Characteristic:
t
CPL
CLKOUT Width Low
t
CPH
CLKOUT Width High
t
CKOH
CLKIN High to CLKOUT High
97.6
20
20
488
150
ns
ns
ns
ns
5t
CK1
38.8
38.8
0
0.5t
CK
– 10
0.5t
CK
– 10
ns
ns
ns
20
NOTES
1
Applies after powerup sequence is complete. Internal phase lock loop requires no more than 2000 CLKIN cycles assuming stable CLKIN (not including crystal
oscillator startup time).
TIMNGPARAMETERS (ADSP-2103/2162/2164)
CLOCK SIGNALS & RE SE T
Figure 39. Clock Signals
CLKIN
CLKOUT
t
CKH
t
CK
t
CKL
t
CKOH
t
CPH
t
CPL
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