參數(shù)資料
型號(hào)： ADT7466
廠商： Analog Devices, Inc.
英文描述： dBCool Remote Thermal Controller and Voltage Monitor
中文描述： dBCool遠(yuǎn)程熱控制器和電壓監(jiān)視器
文件頁數(shù)： 39/48頁
文件大小： 1269K
代理商： ADT7466
ADT7466
Interrupt Status 2
Table 43. Register 0x11—Interrupt Status Register 2 (Power-On Default = 0x00)
Bit No.
Name
Read/Write
Description
0
OVT
Read only
Setting this bit to 1 indicates that one of the THERM overtemperature limits has been exceeded.
This bit is cleared automatically when the temperature drops below THERM T
HYST
.
1
PHOT
Read only
If Pin 7 is configured as the input for PROCHOT monitoring, this bit is set when the PROCHOT
assertion time exceeds the limit programmed in the PROCHOT limit register (0x1E).
2
D1
Read only
Setting this bit to 1 indicates either an open or a short circuit on the Thermal Diode 1 inputs.
3
D2
Read only
Setting this bit to 1 indicates either an open or a short circuit on the Thermal Diode 2 inputs.
4
TH1
Read only
Setting this bit to 1 indicates either an open or a short circuit on the TH1 input.
5
TH2
Read only
Setting this bit to 1 indicates either an open or a short circuit on the TH2 input.
6
Unused
Read only
Not used. Reads back 0.
7
Unused
Read only
Not used. Reads back 0.
Interrupt Mask 1
Table 44. Register 0x12—Interrupt Mask Register 1 (Power-On Default = 0x00)
Bit No.
Name
Read/Write
Description
0
FAN2
Read only
Setting this bit masks the Fan 2 interrupt from the ALERToutput.
1
FAN1
Read only
Setting this bit masks the Fan 1 interrupt from the ALERT output.
2
LOC
Read only
Setting this bit masks the local temperature. interrupt from the ALERT output.
3
REM
Read only
Setting this bit masks the remote temperature interrupt from the ALERT output.
4
V
CC
Read only
Setting this bit masks the V
CC
interrupt from the ALERT output.
5
AIN2(TH2)
Read only
Setting this bit masks the AIN2(TH2) interrupt from the ALERT output.
6
AIN1
/TH1/REM2
7
OOL
Read only
Setting this bit masks the OOL interrupt from the ALERT output.
Interrupt Mask 2
Table 45. Register 0x13—Interrupt Mask Register 2 (Power-On Default = 0x00)
Bit No.
Name
Read/Write
Description
0
OVT
Read only
Setting this bit masks the OVT interrupt from ALERT output.
1
PHOT
Read only
Setting this bit masks the THERM interrupt from ALERT output.
2
D1
Read only
Setting this bit masks the Thermal Diode 1 fault interrupt from ALERT output.
3
D2
Read only
Setting this bit masks Thermal Diode 2 fault interrupt from ALERT output.
4
TH1
Read only
Setting this bit masks the TH1 fault interrupt from ALERT output.
5
TH2
Read only
Setting this bit masks the TH2 fault interrupt from ALERT output.
6
Unused
Read only
Not used. Reads back 0.
7
Unused
Read only
Not used. Reads back 0.
Rev. 0 | Page 39 of 48
Read only
Setting this bit masks the AIN1(TH1)/REM2 interrupt from the ALERT output.
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