參數(shù)資料
型號(hào)： ADT7466ARQZ-REEL
廠商： ANALOG DEVICES INC
元件分類： 模擬信號(hào)調(diào)理
英文描述： dBCool Remote Thermal Controller and Voltage Monitor
中文描述： SPECIALTY ANALOG CIRCUIT, PDSO16
封裝： LEAD FREE, MO-137AB, QSOP-16
文件頁(yè)數(shù)： 45/48頁(yè)
文件大小： 1269K
代理商： ADT7466ARQZ-REEL
ADT7466
Fan Pulses Per Revolution
Table 64. Register 0x39—Fan Pulses Per Revolution Register (Power-On Default = 0x05)
Bit No.
Name
Read/Write
1:0
FAN1
Read/Write
Rev. 0 | Page 45 of 48
Description
Sets number of pulses to be counted when measuring FAN1 speed. Can be
used to determine fan’s pulses per revolution number for unknown fan type.
Pulses Counted
00 = 1
01 = 2 (default)
10 = 3
11 = 4
Sets number of pulses to be counted when measuring FAN2 speed. Can be
used to determine fan’s pulses per revolution number for unknown fan type.
Pulses Counted
00 = 1
01 = 2 (default)
10 = 3
11 = 4
Unused. Write ignored. Reads back 0.
3:2
FAN2
Read/Write
7:4
Information Registers
Table 65. Register 0x3D—Device ID Register (Power-On Default = 0x66)
Bit No.
Name
Read/Write
7:0
Reserved
Read only
Table 66. Register 0x3E—Company Id Register (Power-On Default = 0x41)
Bit No.
Name
Read/Write
7:0
Reserved
Read only
Table 67. Register 0x3F—Revision Number Register (Power-On Default = 0x02)
Bit No.
Name
Read/Write
7:0
Reserved
Read only
Fan Drive (DAC)
These registers reflect the drive value of each fan at any given time. When in automatic fan speed control mode, the ADT7466 reports the
drive values back through these registers. The fan drive values vary according to temperature in automatic fan speed control mode.
During fan startup, these registers report 0x00. In software mode, the fan drive outputs can be set to any value by writing to these
registers.
Table 68. Fan Drive (DAC) Registers (Power-On Default = 0x00)
Register Address
Read/Write
Description
0x40
Read/Write
DRIVE1, Current Fan 1 drive value.
0x41
Read/Write
DRIVE2, Current Fan 2 drive value.
XOR Tree Test Enable
This register becomes read only when the Configuration Register 1 lock bit is set to 1. Additional attempts to write to this register have no
effect.
Table 69. Register 0x42—XOR Tree Test Enable (Power-On Default = 0x00)
Bit No.
Name
Read/Write
Description
7:1
Reserved
–
Unused. Do not write to these bits.
0
XEN
Read/Write
If the XEN bit is set to 1, the device enters the XOR tree test mode. Clearing the bit
removes the device from the XOR test mode.
Unused
–
Description
Contains device ID number.
Description
Contains company ID number.
Description
Contains device revision level.
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