參數(shù)資料
型號： ADUC832BCPZ
廠商： Analog Devices Inc
文件頁數(shù)： 75/92頁
文件大?。?/td> 0K
描述： IC MCU 62K FLASH ADC/DAC 56LFCSP
標準包裝： 1
系列： MicroConverter® ADuC8xx
核心處理器： 8052
芯體尺寸： 8-位
速度： 16MHz
連通性： EBI/EMI，I²C，SPI，UART/USART
外圍設備： PSM，溫度傳感器，WDT
輸入/輸出數(shù)： 34
程序存儲器容量： 62KB（62K x 8）
程序存儲器類型： 閃存
EEPROM 大?。?/td> 4K x 8
RAM 容量： 2.25K x 8
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 8x12b，D/A 2x12b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 56-VFQFN 裸露焊盤，CSP
包裝： 托盤
Data Sheet
ADuC832
Rev. B | Page 77 of 92
UART SERIAL PORT BAUD RATE GENERATION
Mode 0 Baud Rate Generation
The baud rate in Mode 0 is fixed.
Mode 0 Baud Rate = (Core_CLK Frequency/12)
Mode 2 Baud Rate Generation
The baud rate in Mode 2 depends on the value of the SMOD bit
in the PCON SFR. If SMOD = 0, the baud rate is 1/64 of the
core clock. If SMOD = 1, the baud rate is 1/32 of the core clock:
Mode 2 Baud Rate = (2SMOD/64) × (Core_CLK Frequency)
Mode 1 and Mode 3 Baud Rate Generation
The baud rates in Mode 1 and Mode 3 are determined by the
overflow rate in Timer 1 or Timer 2, or both (one for transmit
and the other for receive).
TIMER 1 GENERATED BAUD RATES
When Timer 1 is used as the baud rate generator, the baud rates
in Mode 1 and Mode 3 are determined by the Timer 1 overflow
rate and the value of SMOD as follows:
Mode 1 and Mode 3 Baud Rate =
(2SMOD/32) × (Timer 1 Overflow Rate)
The Timer 1 interrupt should be disabled in this application.
The timer itself can be configured for either timer or counter
operation, and in any of its three running modes. In the most
typical application, it is configured for timer operation in the
autoreload mode (high nibble of TMOD = 0010 binary). In that
case, the baud rate is given by the formula:
Modes 1 and 3 Baud Rate =
(2SMOD/32) × (Core_CLK/(12 × [256 TH1]))
Table 41 shows some commonly used baud rates and how they
can be calculated from a core clock frequency of 16.78 MHz
and 2.0971 MHz. A 5% error is tolerable using asynchronous
(start/stop) communications.
Table 41. Commonly Used Baud Rates, Timer 1
Ideal
Baud
Core_CLK
(MHz)
SMOD
Value
TH1 Reload
Value
Actual
Baud
%
Error
9600
16.78
1
9 (F9H)
9709
1.14
2400
16.78
1
36 (DCH)
2427
1.14
1200
16.78
1
73 (B7H)
1197
0.25
1200
2.10
0
9 (F4H)
1213
1.14
TIMER 2 GENERATED BAUD RATES
Baud rates can also be generated using Timer 2. Using Timer 2
is similar to using Timer 1 in that the timer must overflow 16
times before a bit is transmitted/received. Because Timer 2 has a
16-bit autoreload mode, a wider range of baud rates is possible
using Timer 2.
Mode 1 and Mode 3 Baud Rate =
(1/16) × (Timer 2 Overflow Rate)
Therefore, when Timer 2 is used to generate baud rates, the timer
increments every two clock cycles and not every core machine
cycle. Thus, it increments six times faster than Timer 1, and
therefore baud rates six times faster are possible. Because Timer
2 has 16-bit autoreload capability, very low baud rates are still
possible.
Timer 2 is selected as the baud rate generator by setting the
TCLK and/or RCLK bit in T2CON. The baud rates for transmit
and receive can be simultaneously different. Setting RCLK and/or
TCLK puts Timer 2 into its baud rate generator mode, as shown
In this case, the baud rate is given by the following formula:
Modes 1 and 3 Baud Rate =
(Core_CLK)/(32 × [6556 (RCAP2H, RCAP2L)])
Table 42 shows some commonly used baud rates and how they
can be calculated from a core clock frequency of 16.78 MHz
and 2.10 MHz.
Table 42. Commonly Used Baud Rates, Timer 2
Ideal
Baud
Core_CLK
(MHz)
RCAP2H
Value
RCAP2L
Value
Actual
Baud
%
Error
19,200
16.78
1 (FFH)
27 (E5H)
19418
1.14
9600
16.78
1 (FFH)
55 (C9H)
9532
0.7
2400
16.78
1 (FFH)
218 (26H)
2405
0.21
1200
16.78
2 (FEH)
181 (4BH)
1199
0.02
9600
2.10
1 (FFH)
7 (FBH)
9362
2.4
2400
2.10
1 (FFH)
27 (ECH)
2427
1.14
1200
2.10
1 (FFH)
55 (C9H)
1191
0.7
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