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參數(shù)資料
| 型號(hào)： | ADUC842BCPZ8-5 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 25/88頁 |
| 文件大小： | 0K |
| 描述： | IC MCU 8KB FLASH ADC/DAC 56LFCSP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | MicroConverter® ADuC8xx |
| 核心處理器： | 8052 |
| 芯體尺寸： | 8-位 |
| 速度： | 16.78MHz |
| 連通性： | I²C，SPI，UART/USART |
| 外圍設(shè)備： | DMA，PSM，PWM，溫度傳感器，WDT |
| 輸入/輸出數(shù)： | 32 |
| 程序存儲(chǔ)器容量： | 8KB（8K x 8） |
| 程序存儲(chǔ)器類型： | 閃存 |
| RAM 容量： | 2.25K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 4.75 V ~ 5.25 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 8x12b，D/A 2x12b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 56-VFQFN 裸露焊盤，CSP |
| 包裝： | 托盤 |
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ADuC841/ADuC842/ADuC843
Rev. 0 | Page 31 of 88
Initiating the Calibration in Code
When calibrating the ADC using ADCCON1, the ADC must be
set up into the configuration in which it will be used. The
ADCCON3 register can then be used to set up the device and to
calibrate the ADC offset and gain.
MOV ADCCON1,#08CH ;
ADC on; ADCCLK set
;to divide by 32,4
;acquisition clock
To calibrate device offset:
MOV ADCCON2,#0BH
;select internal AGND
MOV ADCCON3,#25H
;select offset calibration,
;31 averages per bit,
;offset calibration
To calibrate device gain:
MOV ADCCON2,#0CH
;select internal V
REF
MOV ADCCON3,#27H
;select offset calibration,
;31 averages per bit,
;offset calibration
To calibrate system offset, connect system AGND to an ADC
channel input (0).
MOV ADCCON2,#00H
;select external AGND
MOV ADCCON3,#25H
;select offset calibration,
;31 averages per bit
To calibrate system gain, connect system VREF to an ADC
channel input (1).
MOV ADCCON2,#01H
;select external V
REF
MOV ADCCON3,#27H
;select offset calibration,
;31 averages per bit,
;offset calibration
The calibration cycle time TCAL is calculated by the following
equation:
(
)
ACQ
CAL
T
NUMAV
ADCCLK
T
+
×
=
16
14
For an ADCCLK/FCORE divide ratio of 32, TACQ = 4 ADCCLK,
and NUMAV = 15, the calibration cycle time is
()
(
)
ms
T
CAL
8
4
16
15
524288
/
1
14
=
+
×
=
In a calibration cycle, the ADC busy flag (Bit 7), instead of
framing an individual ADC conversion as in normal mode, goes
high at the start of calibration and returns to zero only at the
end of the calibration cycle. It can therefore be monitored in
code to indicate when the calibration cycle is completed. The
following code can be used to monitor the BUSY signal during
a calibration cycle:
WAIT:
MOV A, ADCCON3
;move ADCCON3 to A
JB ACC.7, WAIT
;If Bit 7 is set jump to
WAIT else continue
NONVOLATILE FLASH/EE MEMORY
The ADuC841/ADuC842/ADuC843 incorporate Flash/EE
memory technology on-chip to provide the user with nonvola-
tile, in-circuit, reprogrammable code and data memory space.
Flash/EE memory is a relatively recent type of nonvolatile
memory technology, which is based on a single transistor cell
architecture. Flash/EE memory combines the flexible in-circuit
reprogrammable features of EEPROM with the space efficient/
density features of EPROM as shown in Figure 37.
Because Flash/EE technology is based on a single transistor cell
architecture, a flash memory array, such as EPROM, can be
implemented to achieve the space efficiencies or memory densities
required by a given design. Like EEPROM, flash memory can be
programmed in-system at a byte level; it must first be erased,
the erase being performed in page blocks. Thus, flash memory
is often and more correctly referred to as Flash/EE memory.
EEPROM
TECHNOLOGY
EPROM
TECHNOLOGY
FLASH/EEMEMORY
TECHNOLOGY
IN-CIRCUIT
REPROGRAMMABLE
SPACE EFFICIENT/
DENSITY
03260-0-036
Figure 37. Flash/EE Memory Development
Overall, Flash/EE memory represents a step closer to the ideal
memory device that includes nonvolatility, in-circuit program-
mability, high density, and low cost. Incorporated in the parts,
Flash/EE memory technology allows the user to update program
code space in-circuit, without the need to replace one-time
programmable (OTP) devices at remote operating nodes.
Flash/EE Memory and the ADuC841/ADuC842/ADuC843
The parts provide two arrays of Flash/EE memory for user
applications. Up to 62 kBytes of Flash/EE program space are
provided on-chip to facilitate code execution without any
external discrete ROM device requirements. The program
memory can be programmed in-circuit by using the serial
download mode provided, by using conventional third party
memory programmers, or via a user defined protocol that can
configure it as data if required.
Note that the following sections use the 62 kByte program space
as an example when referring to ULOAD mode. For the other
memory models (32 kByte and 8 kByte), the ULOAD space
moves to the top 8 kBytes of the on-chip program memory, i.e.,
for 32 kBytes, the ULOAD space is from 24 kBytes to 32 kBytes,
the kernel still resides in a protected space from 60 kBytes to
62 kBytes. There is no ULOAD space present on the 8 kBtye part.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADUC842BS | 制造商:AD 制造商全稱:Analog Devices 功能描述:12- Bit ADCs and DACs with Embedded Hi-Speed 62KB FLASH MCU |
| ADUC842BS62-3 | 制造商:Analog Devices 功能描述:MCU 8-bit ADuC8xx 8052 CISC 62KB Flash 3V 52-Pin MQFP 制造商:Analog Devices 功能描述:IC MICROCONTROLLER |
| ADUC842BS62-5 | 制造商:Analog Devices 功能描述:MCU 8-Bit ADuC8xx 8052 CISC 62KB Flash 5V 52-Pin MQFP 制造商:Rochester Electronics LLC 功能描述:8BIT CISC 62KB FLASH 16.7MHZ 5V 52MQFP - Bulk 制造商:Analog Devices 功能描述:IC MICROCONTROLLER |
| ADUC842BSZ62-3 | 功能描述:IC ADC/DAC 12BIT W/MCU 52MQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:MicroConverter® ADuC8xx 標(biāo)準(zhǔn)包裝:250 系列:LPC11Uxx 核心處理器:ARM? Cortex?-M0 芯體尺寸:32-位 速度:50MHz 連通性:I²C，Microwire，SPI，SSI，SSP，UART/USART，USB 外圍設(shè)備:欠壓檢測(cè)/復(fù)位，POR，WDT 輸入/輸出數(shù):40 程序存儲(chǔ)器容量:96KB（96K x 8） 程序存儲(chǔ)器類型:閃存 EEPROM 大小:4K x 8 RAM 容量:10K x 8 電壓 - 電源 (Vcc/Vdd):1.8 V ~ 3.6 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 8x10b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:48-LQFP 包裝:托盤 其它名稱:568-9587 |
| ADUC842BSZ62-3 | 制造商:Analog Devices 功能描述:IC MICROCONTROLLER |
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